US7444615B2
Expired / Lapsed
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Calibration on wafer sweet spots
Assignee: Cadence Design Systems Inc
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Filing: 2005-05-31
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Granted: 2008-10-28
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Expires: 2025-05-31
Abstract
Abstract A method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips. More particularly, a method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips based on the parameters of test patterns measured at the “wafer sweet spots” so as to arrive at an accurate model.
Inventors
- 👤 Gokhan Percin
- 👤 Ram S. Ramanujam
- 👤 Franz X. Zach
- 👤 Abdurrahman Sezginer
- 👤 Chi-Song Horng
- 👤 Roy Prasad
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 01:10
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/70; G03F7/70425; G03F7/70433; G03F7/70441; G03F1/00; G03F1/36; G03F1/38; G03F1/44; G03F1/68
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
97 words
A method of generating an OPC computational model comprises: a. printing test patterns at multiple sites of a wafer; b. measuring properties of the test patterns printed at multiple sites on the said wafer; c. extracting an across-wafer component of the measured properties, the component being a continuous function of position on the wafer; d. selecting a location on the wafer, wherein a gradient of the across-wafer component is minimum; and e. adjusting parameters of the computational model to minimize the difference between the predictions of the model and the measurements taken in the said selected spot.
Claim 2
Independent Claim
97 words
A method of generating an OPC computational model comprises: a. printing test patterns at multiple sites of a wafer; b. measuring properties of the test patterns printed at multiple sites on the said wafer; c. extracting an across-wafer component of the measured properties, the component being a continuous function of position on the wafer; d. selecting a location on the wafer, wherein a gradient of the across-wafer component is minimum; and e. adjusting parameters of the computational model to minimize the difference between the predictions of the model and the measurements taken in the said selected spot.
Claim 3
Dependent Claim
28 words
The method of claim 1 , wherein the test pattern comprises a line, and wherein (b) comprises measuring a width of a line of the printed test pattern.
Claim 4
Dependent Claim
25 words
The method of claim 1 , wherein the test pattern comprises a space pattern and wherein (b) comprises measuring a width of the space pattern.
Claim 5
Dependent Claim
28 words
The method of claim 1 , wherein the test pattern comprises a combination of line and space patterns having predetermined width for the line pattern and space pattern.
Claim 6
Dependent Claim
19 words
The method of claim 1 , wherein the OPC correction model comprises a model of a mask manufacturing process.
Claim 7
Dependent Claim
19 words
The method of claim 1 , wherein the OPC correction model comprises a model of an optical exposure process.
Claim 8
Dependent Claim
17 words
The method of claim 1 , wherein the OPC correction model comprises a model of resist processing.
Claim 9
Dependent Claim
18 words
The method of claim 1 , wherein the OPC correction model comprises a model of an etch process.
Claim 10
Dependent Claim
30 words
The method of claim 1 , wherein the OPC correction model comprises of a combination or any subset of mask manufacturing process, optical exposure process, resist processing and etch process.
Claim 11
Dependent Claim
39 words
The method of claim 1 , wherein the OPC correction model is operative to predict a printed wafer image based on a given layout using a description of image transformation of at least one step of a patterning process.
Claim 12
Dependent Claim
23 words
The method of claim 1 , wherein the properties in (b) comprise a critical dimension of the test pattern printed on the wafer.
Claim 13
Dependent Claim
30 words
The method of claim 1 , further comprising: extracting an across-wafer component of the variation in the properties measured, the component being a continuous function of position on the wafer.
Claim 14
Dependent Claim
24 words
The method of claim 12 , wherein extracting an across-wafer component variation comprises fitting a smooth function of wafer-position to the critical dimension measurements.
Claim 15
Dependent Claim
70 words
The method of claim 1 , further comprising: a. printing a test pattern on the selected location of a second wafer; b. measuring at least one property of the test patterns printed at the selected location of the said second wafer; and c. adjusting a parameter of the computational model so that the difference between a prediction of the model and a measurement performed in the said selected location minimized.
Claim 16
Dependent Claim
60 words
The method of claim 1 , further comprising: making multiple sets of calibration measurements at multiple locations in the selected location; obtaining a set of model parameters from each set of calibration measurement; calculating the range of values of a model parameter takes among the multiple sets of model parameters, and verifying that the range is smaller than a tolerance.
Claim 17
Dependent Claim
14 words
The method of claim 15 , wherein the value of tolerance is user defined.
Claim 18
Independent Claim
141 words
A method of generating an OPC computational model comprises: a. printing test patterns at multiple sites of a wafer; b. measuring properties of the test patterns printed at multiple sites on the said wafer; c. extracting an across-wafer component of the measured properties, the component being a continuous function of position on the wafer; d. separating the variations in the measurement made in step (b) into an across-wafer variation and other components of variation; e. selecting a location on the wafer, wherein a gradient of an across-wafer component is minimum; f. printing at least one test targets on the said location; g. measuring properties of the said test targets selected in the said location, and h. adjusting parameters of the computational model to minimize the difference between the predictions of the model and the measurements taken in the said selected spot.
Claim 19
Independent Claim
141 words
A method of generating an OPC computational model comprises: a. printing test patterns at multiple sites of a wafer; b. measuring properties of the test patterns printed at multiple sites on the said wafer; c. extracting an across-wafer component of the measured properties, the component being a continuous function of position on the wafer; d. separating the variations in the measurement made in step (b) into an across-wafer variation and other components of variation; e. selecting a location on the wafer, wherein a gradient of an across-wafer component is minimum; f. printing at least one test targets on the said location; g. measuring properties of the said test targets selected in the said location, and h. adjusting parameters of the computational model to minimize the difference between the predictions of the model and the measurements taken in the said selected spot.
Claim 20
Dependent Claim
28 words
The method of claim 17 , wherein the test pattern comprises a line, and wherein (b) comprises measuring a width of a line of the printed test pattern.
Claim 21
Dependent Claim
25 words
The method of claim 17 , wherein the test pattern comprises a space pattern and wherein (b) comprises measuring a width of the space pattern.
Claim 22
Dependent Claim
33 words
The method of claim 17 , wherein the test pattern comprises a combination of line patterns and space patterns having predetermined width for the line pattern and predetermined width for the space pattern.
Claim 23
Dependent Claim
23 words
The method of claim 17 , wherein the properties in (b) comprise a critical dimension of the test pattern printed on the wafer.
Claim 24
Independent Claim
109 words
A method of calibrating a computational model of a patterning process, said method comprising: a. printing test patterns at multiple sites of a wafer; b. measuring a critical dimension of the test patterns printed at multiple sites on the said wafer; c. extracting an across-wafer component of the variation in the critical dimension measurements, the component being a continuous function of position on the wafer; d. selecting a sweet-spot on the wafer where the gradient of the across-wafer component is small; e. adjusting a parameter of the computational model so that the difference between a prediction of the model and a measurement performed in the sweet spot is minimized.
Claim 25
Independent Claim
109 words
A method of calibrating a computational model of a patterning process, said method comprising: a. printing test patterns at multiple sites of a wafer; b. measuring a critical dimension of the test patterns printed at multiple sites on the said wafer; c. extracting an across-wafer component of the variation in the critical dimension measurements, the component being a continuous function of position on the wafer; d. selecting a sweet-spot on the wafer where the gradient of the across-wafer component is small; e. adjusting a parameter of the computational model so that the difference between a prediction of the model and a measurement performed in the sweet spot is minimized.
Claim 26
Dependent Claim
28 words
The method of claim 22 , wherein the test pattern comprises a line, and wherein (b) comprises measuring a width of a line of the printed test pattern.
Claim 27
Dependent Claim
25 words
The method of claim 22 , wherein the test pattern comprises a space pattern and wherein (b) comprises measuring a width of the space pattern.
Claim 28
Dependent Claim
33 words
The method of claim 22 , wherein the test pattern comprises a combination of line patterns and space patterns having predetermined width for the line pattern and predetermined width for the space pattern.
References Cited (Backward Citations)
US7269804B2
Cited
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