US7352067B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stacked semiconductor device
Assignee: NEC Corp
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Filing: 2005-06-27
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Granted: 2008-04-01
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Expires: 2025-06-27
Abstract
Abstract A stacked semiconductor device includes a plurality of semiconductor chips and a conductive path extending through at least one of the semiconductor chips. The semiconductor chips are stacked together. The semiconductor chips are electrically connected by the conductive path, and the conductive path has a plurality of through-connections extending through the corresponding semiconductor chip.
Inventors
- 👤 Muneo Fukaishi
- 👤 Hideaki Saito
- 👤 Yasuhiko Hagihara
- 👤 Masayuki Mizuno
- 👤 Hiroaki Ikeda
- 👤 Kayoko Shibata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:00
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; G; G11; G11C; G11C5/00; G11C5/02; G11C5/04; H10W90/00; H10W20/20; H10W72/00; H10W72/01; H10W90/20; H10W90/297; H10W90/701; H10W90/721; H10W90/722
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
90 words
A stacked semiconductor device comprising: a plurality of semiconductor chips, said semiconductor chips being stacked together; and a conductive path from a first terminal to a second terminal extending through at least one of said semiconductor chips; wherein said semiconductor chips are electrically connected by said conductive path, and each conductive path has a plurality of through-connections extending through the at least one semiconductor chip; and wherein each of the plurality of through-connections is routed through a through-via, said through-via comprising a hole in the at least one semiconductor chip.
Claim 2
Dependent Claim
90 words
A stacked semiconductor device comprising: a plurality of semiconductor chips, said semiconductor chips being stacked together; and a conductive path from a first terminal to a second terminal extending through at least one of said semiconductor chips; wherein said semiconductor chips are electrically connected by said conductive path, and each conductive path has a plurality of through-connections extending through the at least one semiconductor chip; and wherein each of the plurality of through-connections is routed through a through-via, said through-via comprising a hole in the at least one semiconductor chip.
Claim 3
Dependent Claim
14 words
The device according to claim 1 , wherein said through-connections have electrically identical characteristics.
Claim 4
Dependent Claim
16 words
The device according to claim 1 , wherein said through-connections are connected parallel to each other.
Claim 5
Dependent Claim
29 words
The device according to claim 1 , further comprising a switch circuit connected to said through-connections for selectively using a normal one of said through-connections as a signal path.
Claim 6
Dependent Claim
18 words
The device according to claim 4 , wherein said switch circuit separates a faulty one of said through-connections.
Claim 7
Dependent Claim
19 words
The device according to claim 4 , wherein said switch circuit is associated with each of said semiconductor chips.
Claim 8
Dependent Claim
15 words
The device according to claim 4 , wherein said switch circuit comprises a tristate circuit.
Claim 9
Dependent Claim
15 words
The device according to claim 7 , wherein said switch circuit comprises a transfer gate.
Claim 10
Dependent Claim
53 words
The stacked semiconductor device according to claim 4 , wherein said through-connections include primary faulty through-connections and backup through-connections, each of said primary faulty through-connections being associated with a plurality of said backup through-connections, and wherein said switch circuit switches each of said primary faulty through-connections to either one of said backup through-connections.
Claim 11
Dependent Claim
29 words
The stacked semiconductor device according to claim 9 , wherein the number of said primary faulty through-connections and the number of said backup through-connections are equal to each other.
Claim 12
Dependent Claim
34 words
The stacked semiconductor device according to claim 1 , wherein said through-connections include primary faulty through-connections and backup through-connections, each of said backup through-connections being shared by a plurality of said primary faulty through-connections.
Claim 13
Dependent Claim
27 words
The stacked semiconductor device according to claim 4 , wherein said switch circuit has a function to detect a failure or a performance deterioration of said through-connections.
Claim 14
Dependent Claim
33 words
The stacked semiconductor device according to claim 12 , wherein said switch circuit separates one of the through-connections whose failure or performance deterioration is detected, and switches to another one of the through-connections.
Claim 15
Dependent Claim
58 words
The stacked semiconductor device according to claim 1 , wherein said through-connections include primary faulty through-connections and backup through-connections, each of said semiconductor chips having a plurality of functional circuits, said primary faulty through-connections being connected to said functional circuits, each of said backup through-connections being associated with and shared by at least two of said primary connections.
Claim 16
Dependent Claim
32 words
The stacked semiconductor device according to claim 14 , wherein each of said backup through-connections is disposed between said functional circuits to which said primary connections sharing said backup through-connection are connected.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2011-04-01 | 2011-10-01 | 2012-04-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2015-04-01 | 2015-10-01 | 2016-04-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2019-04-01 | 2019-10-01 | 2020-04-01 | $7700.00 | Window Closed / Lapsed |