US6849802B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor chip, chip stack package and manufacturing method
Assignee: Samsung Electronics Co Ltd
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Filing: 2003-02-04
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Granted: 2005-02-01
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Expires: 2023-02-04
Abstract
Abstract A semiconductor chip has connection lines that are routed to the side surface from bump pads on the back surface of the chip. Such semiconductor chips are stacked on a circuit board to form a chip stack package while bumps are interposed between the bump pads of the lower chip and bonding pads of the upper chip. Further, an interconnecting member such as a conductive adhesive or a wiring board is applied to the side surfaces of the stacked chips such that the connection lines are connected to the interconnecting member. Therefore, the centrally disposed bonding pads of the chips are electrically connected to the circuit board through the bumps, the bump pad, the connection lines and the interconnecting member. The semiconductor chip may have heat dissipation part formed on the back surface. Methods of manufacturing the semiconductor chip and the chip stack package are also provided.
Inventors
- 👤 Young Hee Song
- 👤 Sa Yoon Kang
- 👤 Min Young Son
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:12
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W90/00; H10W70/00; H10W70/099; H10W72/834; H10W90/20; H10W90/22; H10W90/288; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
99 words
A semiconductor chip comprising: an active surface; a back surface obverse to the active surface; a side surface between the active surface and the back surface; a plurality of bonding pads formed on the active surface; a plurality of bump pads formed on the back surface, each bump pad corresponding to at least one of the plurality of bonding pads; and a plurality of connection lines formed on the back surface, each connection line being connected to a corresponding one of the bump pads and extended to the side surface and having an exposed surface on the side surface.
Claim 2
Dependent Claim
99 words
A semiconductor chip comprising: an active surface; a back surface obverse to the active surface; a side surface between the active surface and the back surface; a plurality of bonding pads formed on the active surface; a plurality of bump pads formed on the back surface, each bump pad corresponding to at least one of the plurality of bonding pads; and a plurality of connection lines formed on the back surface, each connection line being connected to a corresponding one of the bump pads and extended to the side surface and having an exposed surface on the side surface.
Claim 3
Dependent Claim
20 words
The semiconductor chip of claim 1 , further comprising: at least one heat dissipation part formed on the back surface.
Claim 4
Dependent Claim
263 words
A chip stack package comprising: a circuit board having first contact pads and second contact pads; a lower semiconductor chip having an active surface, a back surface obverse to the active surface, a side surface between the active surface and the back surface, a plurality of bonding pads formed on the active surface, a plurality of bump pads formed on the back surface and corresponding to the bonding pad, and a plurality of connection lines formed on the back surface, each connection line being connected to the bump pad and extended to the side surface; at least one upper semiconductor chip having an active surface, a back surface obverse to the active surface, a side surface between the active surface and the back surface, a plurality of bonding pads formed on the active surface, a plurality of bump pads formed on the back surface and respectively corresponding to the bonding pads, and a plurality of connection lines formed on the back surface, each connection line being connected to the bump pad and extended to the side surface; a plurality of bumps electrically and physically connecting the bonding pads of the upper semiconductor chip to the bump pads of the lower semiconductor chip, and connecting the bonding pads of the lower semiconductor chip to the second contact pads of the circuit board; an interconnecting member applied to the side surfaces of both the lower semiconductor chip and the upper semiconductor chip, and connected to the first contact pads of the circuit board; and a plurality of outer terminals electrically connected to the circuit board.
Claim 5
Dependent Claim
263 words
A chip stack package comprising: a circuit board having first contact pads and second contact pads; a lower semiconductor chip having an active surface, a back surface obverse to the active surface, a side surface between the active surface and the back surface, a plurality of bonding pads formed on the active surface, a plurality of bump pads formed on the back surface and corresponding to the bonding pad, and a plurality of connection lines formed on the back surface, each connection line being connected to the bump pad and extended to the side surface; at least one upper semiconductor chip having an active surface, a back surface obverse to the active surface, a side surface between the active surface and the back surface, a plurality of bonding pads formed on the active surface, a plurality of bump pads formed on the back surface and respectively corresponding to the bonding pads, and a plurality of connection lines formed on the back surface, each connection line being connected to the bump pad and extended to the side surface; a plurality of bumps electrically and physically connecting the bonding pads of the upper semiconductor chip to the bump pads of the lower semiconductor chip, and connecting the bonding pads of the lower semiconductor chip to the second contact pads of the circuit board; an interconnecting member applied to the side surfaces of both the lower semiconductor chip and the upper semiconductor chip, and connected to the first contact pads of the circuit board; and a plurality of outer terminals electrically connected to the circuit board.
Claim 6
Dependent Claim
25 words
The chip stack package of claim 3 , wherein each semiconductor chip further has at least one heat dissipation part formed on the back surface.
Claim 7
Dependent Claim
33 words
The chip stack package of claim 3 , wherein each semiconductor chip further has a plurality of grooves etched on the back surface and filled with the bump pads and the connection lines.
Claim 8
Dependent Claim
30 words
The chip stack package of claim 4 , wherein each semiconductor chip further has at least one groove etched on the back surface and filled with the heat dissipation part.
Claim 9
Dependent Claim
23 words
The chip stack package of claim 3 , wherein each semiconductor chip further has an insulation layer formed on the entire back surface.
Claim 10
Dependent Claim
23 words
The chip stack package of claim 5 , wherein each semiconductor chip further has an insulation layer formed on surfaces of the grooves.
Claim 11
Dependent Claim
26 words
The chip stack package of claim 3 , wherein the bonding pads of each semiconductor chip are disposed along a central line of the back surface.
Claim 12
Dependent Claim
38 words
The chip stack package of claim 3 , wherein the interconnecting member is a conductive adhesive coated on the side surface along each vertical row of ends of the connection lines and terminated to the first contact pads.
Claim 13
Dependent Claim
46 words
The chip stack package of claim 3 , wherein the interconnecting member is a wiring board having conductive lines on an insulating board, the respective conductive lines being attached to ends of the connection lines at the side surface and connected to the first contact pads.
Claim 14
Dependent Claim
20 words
The chip stack package of claim 3 , wherein the outer terminals are metallic balls attached to the circuit board.
Claim 15
Dependent Claim
24 words
The chip stack package of claim 3 , wherein the outer terminals are lead frames electrically connected to the circuit board by bonding wires.
Claim 16
Dependent Claim
108 words
A semiconductor chip comprising: an active surface; a back surface obverse to the active surface; a side surface between the active surface and the back surface; a plurality of bonding pads formed on the active surface; a plurality of bump pads formed on the back surface, each bump pad corresponding to at least one of the plurality of bonding pads; and a plurality of connection lines formed on the back surface, each connection line being connected to a corresponding one of the bump pads and extended to the side surface and having an exposed surface on the side surface to provide a connection region on the side surface.
Claim 17
Dependent Claim
108 words
A semiconductor chip comprising: an active surface; a back surface obverse to the active surface; a side surface between the active surface and the back surface; a plurality of bonding pads formed on the active surface; a plurality of bump pads formed on the back surface, each bump pad corresponding to at least one of the plurality of bonding pads; and a plurality of connection lines formed on the back surface, each connection line being connected to a corresponding one of the bump pads and extended to the side surface and having an exposed surface on the side surface to provide a connection region on the side surface.
Claim 18
Dependent Claim
20 words
The semiconductor chip of claim 14 , further comprising: at least one heat dissipation part formed on the back surface.
References Cited (Backward Citations)
US5394303A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-02-01 | 2008-08-02 | 2009-02-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-02-01 | 2012-08-02 | 2013-02-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-02-01 | 2016-08-02 | 2017-02-01 | $7700.00 | Window Closed / Lapsed |