Multiphase synchronous buck converter with improved output current sharing

Claim 1

A multi-phase synchronous buck converter comprising: a plurality of single phase buck converter stages, each stage including: a first switching transistor connected between an input and a first node; a second switching transistor connected between the first node and a second node; a series inductor connected between the first or second node and an output node; a capacitor connected between the output node and the second node, the output nodes of all the individual converter stages being connected together to provide an output current to a load which is contributed to by all the converter stages; a drive circuit which is operative to turn the first and second switching transistors on and off according to a variable duty cycle thereby to regulate the voltage at the output node; and a sensing circuit operative to generate an output signal representative of the output current provided by that converter stage; a master controller operative to provide duty cycle control signals in a predetermined phase relationship for the switching transistors of the individual converter stages according to the difference between a feedback voltage from the multi-phase converter and a reference signal representing a desired voltage at the output node; a duty cycle trimming controller coupled between the master controller and the drive circuits for each converter stage; and a current sharing controller which provides control signals to the duty cycle trimming controller, the control signals being representative of the differences between the output currents of the respective stages and a desired current output reflective of substantially equalized stage currents; the duty cycle trimming controller being responsive to the control signals to modify the duty cycle control signals for the converter stages to substantially equalize the output currents of the converter stages.