US6788035B2
Expired / Lapsed
US
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Serial bus control method and apparatus for a microelectronic power regulation system
Assignee: Infineon Technologies Austria AG
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Filing: 2002-06-12
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Granted: 2004-09-07
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Expires: 2022-06-12
Abstract
Abstract A serial bus control method, apparatus, and system for transmitting signals between a master controller and a slave controller associated with a power regulator are disclosed. The serial bus control scheme allows for information to be written to or read from individual regulators or be written to read from all regulators that are coupled to the master controller.
Inventors
- 👤 Keith Bassett
- 👤 Tim Ng
- 👤 Nicholas Steffen
- 👤 Kenneth Ostrom
- 👤 Benjamin Tang
- 👤 Robert Carroll
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 11:05
CPC Classifications
H; H02; H02J; H02J1/00; H02J1/10; H02J1/102; H05; H05K; H05K1/00; H05K1/18; H05K1/181
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
88 words
A system for transmitting signals between a master controller and a secondary regulator, the system comprising: a master controller; a primary regulator coupled between the master controller and a load to provide low frequency power regulation; a communication bus coupled to the master controller; and a secondary regulator, including a serial interface, coupled to the communication bus and the master controller, wherein the secondary regulator is configured to receive information from the master controller and to transmit information to the master controller and to suppress high speed transients.
Claim 2
Independent Claim
88 words
A system for transmitting signals between a master controller and a secondary regulator, the system comprising: a master controller; a primary regulator coupled between the master controller and a load to provide low frequency power regulation; a communication bus coupled to the master controller; and a secondary regulator, including a serial interface, coupled to the communication bus and the master controller, wherein the secondary regulator is configured to receive information from the master controller and to transmit information to the master controller and to suppress high speed transients.
Claim 3
Dependent Claim
14 words
The system of claim 1 , wherein the communication bus comprises two transmission lines.
Claim 4
Dependent Claim
20 words
The system of claim 2 , wherein the communication bus comprises a clock transmission line and a data transmission line.
Claim 5
Dependent Claim
18 words
The system of claim 1 , further comprising a plurality of secondary regulators coupled to the communication bus.
Claim 6
Dependent Claim
35 words
The system of claim 1 , wherein the serial interface is configured to receive serial information, transform the serial information to parallel information, process the parallel information, and transmit serial information to the master controller.
Claim 7
Dependent Claim
19 words
The system of claim 1 , wherein the serial interface comprises a shift register, a register, and control logic.
Claim 8
Dependent Claim
20 words
The system of claim 6 , wherein the serial interface further includes a bit counter and a plurality of multiplexers.
Claim 9
Dependent Claim
17 words
The system of claim 1 , wherein the interface is configured to run a built-in test operation.
Claim 10
Dependent Claim
17 words
The system of claim 1 , wherein the interface is configured to run a status check operation.
Claim 11
Dependent Claim
24 words
The system of claim 1 , wherein the interface includes a tri-state buffer configured to select one of three possible states of output data.
Claim 12
Dependent Claim
34 words
The system of claim 1 , wherein the master controller and the secondary regulator are configured to communicate using a digital word having the first four bits dedicated to an address the secondary regulator.
Claim 13
Dependent Claim
31 words
The system of claim 1 , wherein the master controller and the secondary regulator are configured to communicate using a digital word having two bits dedicated to the mode of operation.
Claim 14
Dependent Claim
29 words
The system of claim 1 , wherein the master controller and the secondary regulator are configured to communicate using a digital word having ten bits dedicated to slave status.
Claim 15
Dependent Claim
29 words
The system of claim 1 , wherein the master controller and the secondary regulator are configured to communicate using a digital word having thirty-six bits dedicated to slave data.
Claim 16
Dependent Claim
21 words
The system of claim 1 , wherein the interface is configured to read information during a rise of a clock signal.
Claim 17
Dependent Claim
78 words
The system of claim 1 , wherein interface write information transmitted from the master controller to the secondary regulator comprises information selected from the group consisting of: output enable output enable, threshold adjust, magnitude adjust, output current pulse slope, output current pulse slope, sense amp gain, sense amp threshold, thermal shutdown threshold, charge well trip level, flash out enable, allowed fire count, force comparator on, test mode, di/dt bank duration, charge well sense locale, and output switch state.
Claim 18
Independent Claim
64 words
A method of communicating between a master controller and a secondary regulator, the method comprising the steps of: providing a master controller; providing at least one primary controller to provide low frequency power regulation, providing a plurality of secondary regulators to suppress high speed transients, wherein each regulator comprises a slave controller; and transmitting digital information between the master controller and the secondary regulator.
Claim 19
Independent Claim
64 words
A method of communicating between a master controller and a secondary regulator, the method comprising the steps of: providing a master controller; providing at least one primary controller to provide low frequency power regulation, providing a plurality of secondary regulators to suppress high speed transients, wherein each regulator comprises a slave controller; and transmitting digital information between the master controller and the secondary regulator.
Claim 20
Dependent Claim
30 words
The method of claim 17 , wherein the step of transmitting information comprises providing a digital word having the first four bits dedicated to the address for the secondary regulator.
Claim 21
Dependent Claim
26 words
The method of claim 17 , wherein the step of transmitting information comprises providing a digital word having two pits dedicated to the mode of operation.
Claim 22
Dependent Claim
24 words
The method of claim 17 , wherein the step of transmitting information comprises providing a digital word having ten bits dedicated to slave status.
Claim 23
Dependent Claim
24 words
The method of claim 17 , wherein the step of transmitting information comprises providing a digital word having thirty-six bits dedicated to slave data.
Claim 24
Dependent Claim
25 words
The method of claim 17 , further comprising the step of reading information transmitted from the master controller during a rise of a clock signal.
Claim 25
Dependent Claim
20 words
The method of claim 17 , further comprising the step of writing information to a portion of the secondary regulator.
Claim 26
Dependent Claim
71 words
The method of claim 23 , wherein the step of writing comprises writing information selected from the group consisting of: output enable output enable, threshold adjust, magnitude adjust, output current pulse slope, output current pulse slope, sense amp gain, sense amp threshold, thermal shutdown threshold, charge well trip level, flash out enable, allowed fire count, force comparator on, test mode, di/dt bank duration, charge well sense locale, and output switch state.
Claim 27
Independent Claim
96 words
A system for transmitting signals between a master controller and a secondary regulator, the system comprising: a master controller; a primary regulator coupled between the master controller and a load to provide low frequency power regulation, a communication bus coupled to the master controller; and a secondary regulator, including a serial interface, coupled to the communication bus and the master controller to suppress high speed transients, wherein the master controller and the serial interface communicate using a protocol that supports write, broadcast write, output enable, broadcast output enable, read status, broadcast read status, and read command.
Claim 28
Independent Claim
96 words
A system for transmitting signals between a master controller and a secondary regulator, the system comprising: a master controller; a primary regulator coupled between the master controller and a load to provide low frequency power regulation, a communication bus coupled to the master controller; and a secondary regulator, including a serial interface, coupled to the communication bus and the master controller to suppress high speed transients, wherein the master controller and the serial interface communicate using a protocol that supports write, broadcast write, output enable, broadcast output enable, read status, broadcast read status, and read command.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2007-09-07 | 2008-03-08 | 2008-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2011-09-07 | 2012-03-08 | 2012-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2015-09-07 | 2016-03-08 | 2016-09-07 | $7700.00 | Window Closed / Lapsed |