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US6777819B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor package with flash-proof device

Assignee: Siliconware Precision Industries Co Ltd
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Filing: 2001-10-23
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Granted: 2004-08-17
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Expires: 2021-10-23
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Abstract

Abstract A semiconductor package with a flash-proof device is proposed, in which at least one chip and at least one passive device mounted on a substrate are covered by a flash-proof device dimensionally designed for positioning the substrate in a conventional mold and preventing a molding resin from flashing on the substrate in a molding process, and thus quality of the fabricated package can be assured. Due to no need of a specifically designed mold, fabrication costs are reduced. Furthermore, the flash-proof device has its top side exposed to outside of an encapsulant formed in the molding process, thereby allowing heat dissipating efficiency to be improved. Moreover, the flash-proof device provides shielding for the chip and the passive device received therein, so that external electromagnetic interference with performance of the semiconductor package can be reduced.

Inventors

  • 👤 Chien-Ping Huang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 10:54
CPC Classifications
H; H05; H05K; H05K5/00; H05K5/0091; H05K5/0095; H10; H10W; H10W42/00; H10W42/20; H10W74/00; H10W74/01; H10W74/016; H10W72/00; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 229 words
A semiconductor package, comprising: a substrate having a first side for disposing a plurality of conductive traces thereon, and a second side for forming a plurality of electrical connection terminals thereon; at least one chip attached to the first side of the substrate and electrically connected to the conductive traces; at least one passive device attached to the first side of the substrate and electrically connected to the conductive traces; a flash-proof device attached to the first side of the substrate and formed with a cavity for receiving the chip and the passive device therein, wherein a distance in elevation from a top side of the flash-proof device to the first side of the substrate is made to be slightly greater than a depth of a molding cavity of a mold used in a molding process, and the flash-proof device has an outer sidewall aligned with a side edge of the substrate; and an encapsulant formed by a molding compound for encapsulating the chip, the passive device, the flash-proof device and the substrate, wherein the second side of the substrate is exposed to outside of the encapsulant; wherein by the elevation-to-depth arrangement of the flash-proof device and the molding cavity, the top side of the flash-proof device is exposed to outside of the encapsulant, and the second side of the substrate is free of flash of the molding compound.
Claim 2
Dependent Claim 229 words
A semiconductor package, comprising: a substrate having a first side for disposing a plurality of conductive traces thereon, and a second side for forming a plurality of electrical connection terminals thereon; at least one chip attached to the first side of the substrate and electrically connected to the conductive traces; at least one passive device attached to the first side of the substrate and electrically connected to the conductive traces; a flash-proof device attached to the first side of the substrate and formed with a cavity for receiving the chip and the passive device therein, wherein a distance in elevation from a top side of the flash-proof device to the first side of the substrate is made to be slightly greater than a depth of a molding cavity of a mold used in a molding process, and the flash-proof device has an outer sidewall aligned with a side edge of the substrate; and an encapsulant formed by a molding compound for encapsulating the chip, the passive device, the flash-proof device and the substrate, wherein the second side of the substrate is exposed to outside of the encapsulant; wherein by the elevation-to-depth arrangement of the flash-proof device and the molding cavity, the top side of the flash-proof device is exposed to outside of the encapsulant, and the second side of the substrate is free of flash of the molding compound.
Claim 3
Dependent Claim 20 words
The semiconductor package of claim 1 , wherein the flash-proof device is attached to the substrate by an elastic adhesive.
Claim 4
Dependent Claim 21 words
The semiconductor package of claim 1 , wherein the flash-proof device is attached to the substrate by a thermally conductive adhesive.
Claim 5
Dependent Claim 32 words
The semiconductor package of claim 1 , wherein the flash-proof device is further formed with a plurality of vias, which allow a molding compound used for forming the encapsulant to flow therethrough.
Claim 6
Dependent Claim 25 words
The semiconductor package of claim 1 , wherein a plurality of step-like recesses are formed on edges of the top side of the flash-proof device.
Claim 7
Dependent Claim 24 words
The semiconductor package of claim 1 , wherein the flash-proof device has an outer sidewall thereof adjacent to a side edge of the substrate.
Claim 8
Dependent Claim 41 words
The semiconductor package of claim 1 , wherein a plurality of ground traces are formed on the conductive traces at positions corresponding to the flash-proof device, for attaching the flash-proof device to the ground traces by using an electrically conductive adhesive.

References Cited (Backward Citations)

US5530295A Cited
US5812570A Cited
US6069027A Cited
US6294831B1 Cited
US6392900B1 Cited
US6191360B1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2007-08-17 2008-02-16 2008-08-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2011-08-17 2012-02-16 2012-08-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2015-08-17 2016-02-16 2016-08-17 $7700.00 Window Closed / Lapsed

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