US6771392B1
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US
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High resolution image mapping for simulating high resolution printing using high addressability without affecting halftone rendering
Assignee: Xerox Corp
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Filing: 1999-09-24
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Granted: 2004-08-03
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Expires: 2019-09-24
Abstract
Abstract A method for simulating high resolution printing by converting high resolution bits of a binary image to sub-pixel high addressable bits is presented. A first image is received having a first fast-scan resolution and a first slow-scan resolution. The first image is converted to a second image having a second fast-scan resolution and a second slow-scan resolution. The second fast-scan resolution of the second image is greater than the first fast-scan resolution of the first image. Also, the second slow-scan resolution of the second image is less than the first slow-scan resolution of the first image. In addition, a method of generating a high addressable halftone image from a high resolution binary image for marking on an image output terminal is presented. A high addressable halftone threshold array having a first high addressability value is converted to a balanced halftone threshold array having a first resolution in a fast-scan direction and the same first resolution in a slow-scan direction. An image is screened by applying the balanced halftone threshold array to the image to generate a screened image which is then converted to a high addressable binary image having a first high addressability value by a mapping transformation conversion.
Inventors
- 👤 Fritz F. Ebner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:20
CPC Classifications
G; G06; G06K; G06K15/00; G06K15/02
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
83 words
A method for simulating high resolution printing by converting high resolution bits of a binary image to sub-pixel high addressable bits, the method comprising the steps of: receiving a first image having a first fast-scan resolution and a first slow-scan resolution; and, converting the first image to a second image having a second fast-scan resolution and a second slow-scan resolution, the second fast-scan resolution being greater than said first fast-scan resolution and the second slow-scan resolution being less than said first slow-scan resolution.
Claim 2
Independent Claim
83 words
A method for simulating high resolution printing by converting high resolution bits of a binary image to sub-pixel high addressable bits, the method comprising the steps of: receiving a first image having a first fast-scan resolution and a first slow-scan resolution; and, converting the first image to a second image having a second fast-scan resolution and a second slow-scan resolution, the second fast-scan resolution being greater than said first fast-scan resolution and the second slow-scan resolution being less than said first slow-scan resolution.
Claim 3
Dependent Claim
31 words
The method according to claim 1 wherein the step of converting includes mapping a plurality of portions of said first image to a corresponding plurality of portions of said second image.
Claim 4
Dependent Claim
69 words
The method according to claim 2 wherein the step of mapping includes mapping said plurality of portions of said first image to said corresponding plurality of portions of said second image in a manner to establish a one-to-one correspondence between first image bits in each of said plurality of portions of said first image with second image bits in each of said plurality of portions of said second image.
Claim 5
Dependent Claim
43 words
The method according to claim 3 wherein the step of mapping is reversible to map said plurality of portions of said second image to said plurality of portions of said first image without loss of image information of said first or second images.
Claim 6
Dependent Claim
37 words
The method according to claim 3 wherein the step of mapping includes: mapping a plurality of 2×2 pixel block portions of said first image to a corresponding plurality of 4×1 pixel block portions of said second image.
Claim 7
Dependent Claim
41 words
The method according to claim 5 wherein the step of mapping includes: mapping a plurality of 2×2 600 spi pixel block portions of said first image to a corresponding plurality of 4×1 2400×600 spi pixel block portions of said second image.
Claim 8
Dependent Claim
56 words
The method according to claim 5 further including the step of inverse mapping said plurality of portions of said second image to said corresponding plurality of portions of said first image by mapping said plurality of 4×1 pixel block portions of said second image to said plurality of 2×2 pixel block portions of said first image.
Claim 9
Dependent Claim
89 words
The method according to claim 7 further including the step of inverse resolution conversion of a halftone array to generate a preprocessed halftone threshold array according to: for each input row of the second image (in order) { for each column of input row if the column # mod 4 is 0 or 3 then print the pixel go to next output row for each column of input row if the column # mod 4 is 1 or 2 then print the pixel go to next output row }.
Claim 10
Dependent Claim
31 words
The method according to claim 8 further including the step of applying said preprocessed halftone threshold array in a halftoner to render contone image data as high resolution halftoned image data.
Claim 11
Dependent Claim
28 words
The method according to claim 9 further including the step of forward resolution conversion of said high resolution halftoned image data to generate high addressability halftoned image data.
Claim 12
Dependent Claim
41 words
The method according to claim 3 wherein the step of mapping includes: mapping a plurality of 3×3 800 spi pixel block portions of said first image to a corresponding plurality of 9×1 5400×600 spi pixel block portions of said second image.
Claim 13
Dependent Claim
68 words
The method according to claim 2 wherein the mapping step includes mapping, for each of said plurality of portions of said first image, a group of pixels in a first physical area of said first image to a group of pixels in a second physical area of said second image, the first and second physical areas having the same size relative to the first and second images, respectively.
Claim 14
Independent Claim
123 words
A method of generating a high addressable halftone image from a high resolution binary image for marking on an image output terminal, the method comprising the steps of: providing a high addressable halftone threshold array having a first high addressability value; converting the high addressable halftone threshold array to a balanced halftone threshold array having a first resolution in a fast-scan direction and in a slow-scan direction; screening a contone image by applying the balanced halftone threshold array to the contone image to generate a screened image; rendering the screened image at a balanced resolution to generate a rendered image; and, using a forward resolution conversion circuit, converting the rendered image to a high addressable binary image having said first high addressability value.
Claim 15
Independent Claim
123 words
A method of generating a high addressable halftone image from a high resolution binary image for marking on an image output terminal, the method comprising the steps of: providing a high addressable halftone threshold array having a first high addressability value; converting the high addressable halftone threshold array to a balanced halftone threshold array having a first resolution in a fast-scan direction and in a slow-scan direction; screening a contone image by applying the balanced halftone threshold array to the contone image to generate a screened image; rendering the screened image at a balanced resolution to generate a rendered image; and, using a forward resolution conversion circuit, converting the rendered image to a high addressable binary image having said first high addressability value.
Claim 16
Independent Claim
94 words
A system for generating a high addressable halftone image from a high resolution binary image for marking on an image output terminal, the system comprising: a memory storing a preprocessed halftone threshold array having a first resolution in a fast-scan direction and in a slow-scan direction; a halftoner for screening contone video data by applying said preprocessed halftone threshold array to generate a screened image; rendering means for rendering the screened image to generate a rendered image; and, a forward resolution conversion circuit for converting the rendered image to a high addressable binary image.
Claim 17
Independent Claim
94 words
A system for generating a high addressable halftone image from a high resolution binary image for marking on an image output terminal, the system comprising: a memory storing a preprocessed halftone threshold array having a first resolution in a fast-scan direction and in a slow-scan direction; a halftoner for screening contone video data by applying said preprocessed halftone threshold array to generate a screened image; rendering means for rendering the screened image to generate a rendered image; and, a forward resolution conversion circuit for converting the rendered image to a high addressable binary image.
Claim 18
Dependent Claim
36 words
The system according to claim 14 wherein the forward resolution conversion circuit includes means for mapping a plurality of portions of said rendered image to a corresponding plurality of portions of said high addressable binary image.
Claim 19
Independent Claim
187 words
A system for generating a high addressable halftone image from a high resolution binary image for marking on an image output terminal, the system comprising: a memory storing a preprocessed halftone threshold array having a first resolution in a fast-scan direction and in a slow-scan direction; a halftoner for screening contone video data by applying said preprocessed halftone threshold array to generate a screened image; rendering means for rendering the screened image to generate a rendered image; and, a forward resolution conversion circuit for converting the rendered image to a high addressable binary image, said forward resolution conversion circuit including means for mapping a plurality of portions of said rendered image to a corresponding plurality of portions of said high addressable binary image and means for mapping said plurality of portions of said rendered image to said corresponding plurality of portions of said high addressable binary image in a manner to establish a one-to-one correspondence between first image bits in each of said plurality of portions of said rendered image with second image bits in each of said plurality of portions of said high addressable binary image.
Claim 20
Independent Claim
187 words
A system for generating a high addressable halftone image from a high resolution binary image for marking on an image output terminal, the system comprising: a memory storing a preprocessed halftone threshold array having a first resolution in a fast-scan direction and in a slow-scan direction; a halftoner for screening contone video data by applying said preprocessed halftone threshold array to generate a screened image; rendering means for rendering the screened image to generate a rendered image; and, a forward resolution conversion circuit for converting the rendered image to a high addressable binary image, said forward resolution conversion circuit including means for mapping a plurality of portions of said rendered image to a corresponding plurality of portions of said high addressable binary image and means for mapping said plurality of portions of said rendered image to said corresponding plurality of portions of said high addressable binary image in a manner to establish a one-to-one correspondence between first image bits in each of said plurality of portions of said rendered image with second image bits in each of said plurality of portions of said high addressable binary image.
Claim 21
Dependent Claim
42 words
The system according to claim 16 wherein said forward resolution conversion circuit includes means for mapping a plurality of 2×2 pixel block portions of said rendered image to a corresponding plurality of 4×1 pixel block portions of said high addressable binary image.
Claim 22
Dependent Claim
63 words
The system according to claim 17 further comprising an inverse resolution conversion circuit for inverse mapping said plurality of portions of said high addressable binary image to said corresponding plurality of portions of said rendered image by mapping said plurality of 4×1 pixel block portions of said high addressable binary image to said plurality of 2×2 pixel block portions of said rendered image.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2007-08-03 | 2008-02-02 | 2008-08-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2011-08-03 | 2012-02-02 | 2012-08-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2015-08-03 | 2016-02-02 | 2016-08-03 | $7700.00 | Window Closed / Lapsed |