US6707367B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
On-chip multiple tap transformer and inductor
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 2002-07-23
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Granted: 2004-03-16
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Expires: 2022-07-23
Abstract
Abstract An on-chip multiple tap transformed balun includes a 1 st winding and a 2 nd winding having two portions. The 1 st winding is on a 1 st layer of an integrated circuit and is operably coupled for a single ended signal. The 1 st and 2 nd portions of the 2 nd winding are on a 2 nd layer of the integrated circuit. The 1 st portion of the 2 nd winding includes a 1 st node, a 2 nd node, and a tap. The 1 st node is operably coupled to receive a 1 st leg of a 1 st differential signal and the 2 nd node is coupled to a reference potential. The tap of the 1 st portion is operably coupled for a 1 st leg of a 2 nd differential signal. The 2 nd portion of the 2 nd winding includes a 1 st node, 2 nd node, and tap. The 1 st node is operably coupled to receive a 2 nd leg of the 1 st differential signal and the 2 nd node is operably coupled to the reference potential. The tap of the 2 nd portion is coupled for a 2 nd leg of the 2 nd differential signal. The 1 st and 2 nd portions of the 2 nd winding are symmetrical with respect to the 1 st and 2 nd nodes and with respect to the tap nodes.
Inventors
- 👤 Jesus A. Castaneda
- 👤 Razieh Rogougaran
- 👤 Iqbal S. Bhatti
- 👤 Hung Yu Yang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:15
CPC Classifications
H; H01; H01F; H01F17/00; H01F17/0006; H01F21/00; H01F21/12; H03; H03H; H03H7/00; H03H7/42; H10; H10D; H10D84/00; H01F2021/125
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
230 words
An on-chip multiple tap transformer balun comprises: first winding on a first layer of an integrated circuit, wherein the first winding is operably coupled for a single-ended signal; first portion of a second winding on a second layer of the integrated circuit, wherein a first node of the first portion of the second winding is operably coupled for a first leg of a first differential signal, wherein a second node of first portion of the second winding is operably coupled to a reference potential, and wherein a tap of the first portion of the second winding is operably coupled for a first leg of a second differential signal; and second portion of the second winding on the second layer, wherein a first node of the second portion of the second winding is operably coupled for a second leg of the first differential signal, wherein a second node of the second portion of the second winding is operably coupled to the reference potential, wherein a tap of the second portion of the second winding is operably coupled for a second leg of the second differential signal, wherein the second portion of the second winding is substantially symmetrical to the first portion of the second winding, and wherein the tap of the first portion of the second winding is substantially symmetrical to the tap of the second portion of the second winding.
Claim 2
Dependent Claim
230 words
An on-chip multiple tap transformer balun comprises: first winding on a first layer of an integrated circuit, wherein the first winding is operably coupled for a single-ended signal; first portion of a second winding on a second layer of the integrated circuit, wherein a first node of the first portion of the second winding is operably coupled for a first leg of a first differential signal, wherein a second node of first portion of the second winding is operably coupled to a reference potential, and wherein a tap of the first portion of the second winding is operably coupled for a first leg of a second differential signal; and second portion of the second winding on the second layer, wherein a first node of the second portion of the second winding is operably coupled for a second leg of the first differential signal, wherein a second node of the second portion of the second winding is operably coupled to the reference potential, wherein a tap of the second portion of the second winding is operably coupled for a second leg of the second differential signal, wherein the second portion of the second winding is substantially symmetrical to the first portion of the second winding, and wherein the tap of the first portion of the second winding is substantially symmetrical to the tap of the second portion of the second winding.
Claim 3
Dependent Claim
29 words
The on-chip multiple tap transformer balun of claim 1 , wherein each of the first and second portions of the second winding further comprises a substantially octagon interwound shape.
Claim 4
Dependent Claim
34 words
The on-chip multiple tap transformer balun of claim 1 further comprises a shunt winding on a third layer of the integrated circuit, wherein the shunt winding is coupled in parallel with the first winding.
Claim 5
Dependent Claim
74 words
The on-chip multiple tap transformer balun of claim 1 further comprises: the first portion of the second winding including a second tap operably coupled for a first leg of a third differential signal; and the second portion of the second winding including a second tap operably coupled for a second leg of the third differential signal, wherein the second tap of the first portion is symmetrical to the second tap of the second portion.
Claim 6
Dependent Claim
35 words
The on-chip multiple tap transformer balun of claim 1 further comprises: a shunt winding on a third layer of the integrated circuit, wherein the shunt winding is connected in parallel to with the second winding.
Claim 7
Dependent Claim
26 words
The on-chip multiple tap transformer balun of claim 1 , wherein the second layer further comprises a metalization layer of the integrated circuit having lowest resistivity.
Claim 8
Dependent Claim
18 words
The on-chip multiple tap transformer balun of claim 1 , wherein the first winding further comprises multiple turns.
Claim 9
Dependent Claim
18 words
The on-chip multiple tap transformer balun of claim 1 , wherein the second winding further comprises multiple turns.
Claim 10
Dependent Claim
64 words
The on-chip multiple tap transformer balun of claim 1 , wherein the second winding further comprises: a rectangular octagonal shape having a first dimension lengthened with respect to a square octagonal reference shape and having a second dimension shortened with respect to the square octagonal reference shape, wherein area of the rectangular octagonal shape is similar to area of the square octagonal reference shape.
Claim 11
Dependent Claim
56 words
The on-chip multiple tap transformer balun of claim 1 further comprises: an integrated circuit size based on a balancing of inductance values of the on-chip multiple tap transformer balun, turns ratio of the on-chip multiple tap transformer balun, quality factor of the on-chip multiple tap transformer balun, and capacitance of the on-chip multiple tap transformer balun.
Claim 12
Dependent Claim
158 words
A multiple tap differential inductor comprises: first winding on a layer of an integrated circuit, wherein a first node of the first winding is operably coupled for a first leg of a first differential signal, wherein a second node of first winding is operably coupled to a reference potential, and wherein a tap of the first winding is operably coupled for a first leg of a second differential signal; and second winding on the layer, wherein a first node of the second winding is operably coupled for a second leg of the first differential signal, wherein a second node of the second winding is operably coupled to the reference potential, wherein a tap of the second winding is operably coupled for a second leg of the second differential signal, wherein the second winding is substantially symmetrical to the first winding, and wherein the tap of the first winding is substantially symmetrical to the tap of the second winding.
Claim 13
Dependent Claim
158 words
A multiple tap differential inductor comprises: first winding on a layer of an integrated circuit, wherein a first node of the first winding is operably coupled for a first leg of a first differential signal, wherein a second node of first winding is operably coupled to a reference potential, and wherein a tap of the first winding is operably coupled for a first leg of a second differential signal; and second winding on the layer, wherein a first node of the second winding is operably coupled for a second leg of the first differential signal, wherein a second node of the second winding is operably coupled to the reference potential, wherein a tap of the second winding is operably coupled for a second leg of the second differential signal, wherein the second winding is substantially symmetrical to the first winding, and wherein the tap of the first winding is substantially symmetrical to the tap of the second winding.
Claim 14
Dependent Claim
23 words
The on-chip differential inductor of claim 11 , wherein each of the first and second windings further comprises a substantially octagon interwound shape.
Claim 15
Dependent Claim
64 words
The on-chip differential inductor of claim 11 further comprises the first winding including a second tap operably coupled for a first leg of a third differential signal; and the second winding including a second tap operably coupled for a second leg of the third differential signal, wherein the second tap of the first winding is symmetrical to the second tap of the second winding.
Claim 16
Dependent Claim
60 words
The on-chip differential inductor of claim 11 further comprises: first shunt winding on a second layer of the integrated circuit, wherein the first shunt winding is connected in parallel to with the first winding; and second shunt winding on the second layer of the integrated circuit, wherein the second shunt winding is connected in parallel to with the second winding.
Claim 17
Dependent Claim
23 words
The on-chip differential inductor of claim 11 , wherein the layer further comprises a metalization layer of the integrated circuit having lowest resistivity.
Claim 18
Dependent Claim
16 words
The on-chip differential inductor of claim 11 , wherein the first winding further comprises multiple turns.
Claim 19
Dependent Claim
16 words
The on-chip differential inductor of claim 11 , wherein the second winding further comprises multiple turns.
Claim 20
Dependent Claim
39 words
The on-chip differential inductor of claim 11 further comprises: an integrated circuit size based on a balancing of inductance value of the on-chip differential inductor, quality factor of the on-chip differential inductor, and capacitance of the on-chip differential inductor.
Claim 21
Dependent Claim
109 words
An on-chip multiple tap transformer balun comprises: first winding on a first layer of an integrated circuit, wherein the first winding is operably coupled for a single-ended signal; and second winding on a second layer of the integrated circuit, wherein first and second nodes of the second winding are coupled for a first differential signal, wherein first and second taps of the second winding are coupled for a second differential signal, wherein a third tap of the second winding is connected to a reference potential, wherein, with respect to the first and second nodes and the first and second taps, the second winding is symmetrical about the third tap.
Claim 22
Dependent Claim
109 words
An on-chip multiple tap transformer balun comprises: first winding on a first layer of an integrated circuit, wherein the first winding is operably coupled for a single-ended signal; and second winding on a second layer of the integrated circuit, wherein first and second nodes of the second winding are coupled for a first differential signal, wherein first and second taps of the second winding are coupled for a second differential signal, wherein a third tap of the second winding is connected to a reference potential, wherein, with respect to the first and second nodes and the first and second taps, the second winding is symmetrical about the third tap.
Claim 23
Dependent Claim
27 words
The on-chip multiple tap transformer balun of claim 19 , wherein the second winding further comprises a substantially octagon interwound shape with respect to the third tap.
Claim 24
Dependent Claim
34 words
The on-chip multiple tap transformer balun of claim 19 further comprises a shunt winding on a third layer of the integrated circuit, wherein the shunt winding is coupled in parallel with the first winding.
Claim 25
Dependent Claim
45 words
The on-chip multiple tap transformer balun of claim 19 , wherein the second winding further comprises: fourth and fifth taps operably coupled for a third differential signal, wherein the second winding, with respect to the fourth and fifth taps, are symmetrical about the third tap.
Claim 26
Dependent Claim
34 words
The on-chip multiple tap transformer balun of claim 19 further comprises: shunt winding on a third layer of the integrated circuit, wherein the signal winding is connected in parallel to with the second winding.
Claim 27
Dependent Claim
26 words
The on-chip multiple tap transformer balun of claim 19 , wherein the second layer further comprises a metalization layer of the integrated circuit having lowest resistivity.
Claim 28
Dependent Claim
18 words
The on-chip multiple tap transformer balun of claim 19 , wherein the first winding further comprises multiple turns.
Claim 29
Dependent Claim
18 words
The on-chip multiple tap transformer balun of claim 19 , wherein the second winding further comprises multiple turns.
Claim 30
Dependent Claim
64 words
The on-chip multiple tap transformer balun of claim 19 , wherein the second winding further comprises: a rectangular octagonal shape having a first dimension lengthened with respect to a square octagonal reference shape and having a second dimension shortened with respect to the square octagonal reference shape, wherein area of the rectangular octagonal shape is similar to area of the square octagonal reference shape.
Claim 31
Dependent Claim
56 words
The on-chip multiple tap transformer balun of claim 19 further comprises: an integrated circuit size based on a balancing of inductance values of the on-chip multiple tap transformer balun, turns ratio of the on-chip multiple tap transformer balun, quality factor of the on-chip multiple tap transformer balun, and capacitance of the on-chip multiple tap transformer balun.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2007-03-16 | 2007-09-15 | 2008-03-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2011-03-16 | 2011-09-15 | 2012-03-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2015-03-16 | 2015-09-15 | 2016-03-16 | $7700.00 | Window Closed / Lapsed |