US6664579B2
Expired / Lapsed
US
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Magnetic random access memory using bipolar junction transistor
Assignee: SK Hynix Inc
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Filing: 2002-05-06
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Granted: 2003-12-16
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Expires: 2022-05-06
Abstract
Abstract A magnetic random access memory (MRAM) having an MTJ cell located between a word line and a gate oxide film, a reference voltage line in a source junction region, and a connection line in a drain junction region. The constitution and fabrication process of the MRAM are simplified to improve productivity and properties of the device.
Inventors
- 👤 Chang Shuk Kim
- 👤 Hee Bok Kang
- 👤 Sun Ghil Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 04:46
CPC Classifications
H; H10; H10B; H10B61/00; H10B61/20; H10B61/22; B; B82; B82Y; B82Y10/00; G; G11; G11C; G11C11/00; G11C11/02; G11C11/16; G11C11/161
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
40 words
A magnetic random access memory (MRAM) comprising: a word line; a gate oxide film; and a variable resistance device disposed between the word line and the gate oxide film and engaging both the word line and the gate oxide film.
Claim 2
Dependent Claim
40 words
A magnetic random access memory (MRAM) comprising: a word line; a gate oxide film; and a variable resistance device disposed between the word line and the gate oxide film and engaging both the word line and the gate oxide film.
Claim 3
Dependent Claim
35 words
The MRAM according to claim 1 , wherein the variable resistance device comprises a magneto-resistance device selected from the group consisting of an MTJ cell, an AMR, a GMR, a spin valve and a CMR.
Claim 4
Dependent Claim
31 words
The MRAM according to claim 1 , wherein the variable resistance device comprises a phase transformation resistance device having a resistance value varied by phase transformation due to an electric signal.
Claim 5
Dependent Claim
113 words
A magnetic random access memory (MRAM) comprising: a semiconductor substrate; source/drain junction (S/D) regions disposed in an active region of the semiconductor substrate with a channel region disposed on top of the substrate between the S/D regions; a stacked structure comprising a gate oxide film, an MTJ cell of an island type and a word line, the stacked structure positioned over the channel region wherein the stacked structure overlies and engages the channel region and overlies and engages portions of the S/D regions or overlies and engages only the channel region; a reference voltage line in contact with the source junction region; and a bit line in contact with the drain junction region.
Claim 6
Dependent Claim
113 words
A magnetic random access memory (MRAM) comprising: a semiconductor substrate; source/drain junction (S/D) regions disposed in an active region of the semiconductor substrate with a channel region disposed on top of the substrate between the S/D regions; a stacked structure comprising a gate oxide film, an MTJ cell of an island type and a word line, the stacked structure positioned over the channel region wherein the stacked structure overlies and engages the channel region and overlies and engages portions of the S/D regions or overlies and engages only the channel region; a reference voltage line in contact with the source junction region; and a bit line in contact with the drain junction region.
Claim 7
Dependent Claim
21 words
The MRAM according to claim 4 , wherein the gate oxide N film has a thickness of less than 30 Å.
Claim 8
Dependent Claim
29 words
The MRAM according to claim 4 , wherein the MTJ cell comprises a stacked structure having a free ferromagnetic layer, a tunnel barrier layer and a pinned ferromagnetic layer.
Claim 9
Dependent Claim
29 words
The MRAM according to claim 4 , wherein the bit line is in contact with the drain junction region via a connection line and a bit line contact plug.
Claim 10
Dependent Claim
21 words
The MRAM according to claim 4 , wherein an insulating film spacer is formed at side walls of the word line.
References Cited (Backward Citations)
US6351410B1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-12-15 | 2007-06-16 | 2007-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-12-15 | 2011-06-16 | 2011-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-12-15 | 2015-06-16 | 2015-12-16 | $7700.00 | Window Closed / Lapsed |