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US6663427B1 Expired / Lapsed US ⏱️ 0.0 years remaining

High density electrical connector assembly

Assignee: Hon Hai Precision Industry Co Ltd
•
Filing: 2002-07-09
•
Granted: 2003-12-16
•
Expires: 2022-07-09
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Abstract

Abstract An electrical connector assembly comprises a receptacle ( 1 ) and a header ( 8 ). The receptacle comprises a first interface connection piece ( 20 ) including a plurality of first wafers ( 21 ) assembled together to define a plurality of slots ( 200 ) between adjacent first wafers. Each first wafer includes a plurality of signal terminals and a grounding member mounted on opposite sides of a dielectric base thereof. A plurality of daughter circuit boards ( 30 ) each has a first mating portion ( 302 ) and a second mating portion ( 300 ). The mounting portions are inserted into the slots of the first interface connection piece and engage with the signal contacts and the grounding member. The header has a second interface connection piece ( 90 ) including a plurality of second wafers ( 91 ) assembled together to define a plurality of slots ( 900 ) between adjacent second wafers. Each second wafer has an identical construction with that of the first wafer. The second mating portions are inserted into the slots of second interface connection piece and engage with signal contacts and grounding member of the second wafers.

Inventors

  • 👤 Timothy B. Billman
  • 👤 Eric D. Juntwait

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 12:09
CPC Classifications
H; H01; H01R; H01R13/00; H01R13/46; H01R13/514; H01R13/646; H01R13/6461; H01R13/6471; H01R13/648; H01R13/658; H01R13/6581; H01R13/6585; H01R13/6586; H01R13/6587; H01R12/00; H01R12/70; H01R12/71; H01R12/72; H01R12/722; H01R12/724

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 615 words
An electrical connector assembly for electrically connecting with a printed circuit board and a backplane, comprising: a receptacle having a first interface connection piece including a plurality of individual first wafers assembled together to define a plurality of slots between adjacent first wafers, each first wafer including a dielectric base and a plurality of signal terminals and a grounding member respectively mounted on opposite sides of the dielectric base, the signal contacts and the grounding member having tail portions for electrically connecting with the printed circuit board and contacting portions located at the same side of the dielectric base, a plurality of daughter circuit boards each having a first mating portion and a second mating portion, the first mating portions of the circuit boards being inserted into the slots of the first interface connection piece and electrically engaging with the contacting portions of the signal contacts and the grounding members; and a header for electrically connecting the backplane, having a second interface connection piece including a plurality of individual second wafers assembled together to define a plurality of slots between adjacent second wafers, each second wafer having an identical construction with that of the first wafer of the first interface connection piece, the second mating portions of the circuit boards being inserted into the slots of the second interface connection piece and electrically engaging with signal contacts and grounding members of the second wafers for establishing an electrical connection between the printed circuit board and the backplane; wherein each wafer has a plurality of first and second blocks respectively on the opposite sides thereof in a staggered manner, and the first blocks of each wafer are interferentially fitted with recesses formed between adjacent second blocks of an adjacent wafer; wherein the number of the tail portions of the grounding member is the same as that of the first and the second blocks on the opposite sides of the wafer; wherein the tail portions of the grounding member extend through the first blocks of the wafer and the second blocks of the adjacent wafer for electrically connecting with the printed circuit board; wherein the wafer defines a plurality of slots in one side surface thereof, the signal contacts being retained in the slots; wherein the wafer defines a plurality of recesses in the same side surface of the slots of the wafer, and the grounding member has a plurality of contacting legs aligned with the recesses, the contacting portions of the grounding member being formed by the contacting legs for resiliently engaging with a corresponding inserted circuit board; wherein the grounding member has a top flange covering a top edge of the dielectric base, and a plurality of contacting legs extending downwardly from the top flange of the grounding member for facilitating insertion of the circuit board, the contacting portions of the grounding member being formed by the contacting legs; the receptacle further comprises a dielectric housing defining a plurality of parallel channels therein; wherein each circuit board includes a mating portion aligned with a corresponding channel of the dielectric housing; the receptacle further comprises a fastening device fixing the interface connection piece to the housing; wherein the fastening device includes a wall contacting with the interface connection piece and a pair of latches perpendicularly extending from opposite side edges of the wall, each latch having a hook at a free end thereof; wherein the dielectric housing defines a pair of recesses in opposite sides thereof for accommodating the latches of the fastening device, and a pair of cavities recessed from the recesses for locking the hooks therein; the header further comprises a housing and the second interface connection piece is securely received in the housing.
Claim 2
Dependent Claim 615 words
An electrical connector assembly for electrically connecting with a printed circuit board and a backplane, comprising: a receptacle having a first interface connection piece including a plurality of individual first wafers assembled together to define a plurality of slots between adjacent first wafers, each first wafer including a dielectric base and a plurality of signal terminals and a grounding member respectively mounted on opposite sides of the dielectric base, the signal contacts and the grounding member having tail portions for electrically connecting with the printed circuit board and contacting portions located at the same side of the dielectric base, a plurality of daughter circuit boards each having a first mating portion and a second mating portion, the first mating portions of the circuit boards being inserted into the slots of the first interface connection piece and electrically engaging with the contacting portions of the signal contacts and the grounding members; and a header for electrically connecting the backplane, having a second interface connection piece including a plurality of individual second wafers assembled together to define a plurality of slots between adjacent second wafers, each second wafer having an identical construction with that of the first wafer of the first interface connection piece, the second mating portions of the circuit boards being inserted into the slots of the second interface connection piece and electrically engaging with signal contacts and grounding members of the second wafers for establishing an electrical connection between the printed circuit board and the backplane; wherein each wafer has a plurality of first and second blocks respectively on the opposite sides thereof in a staggered manner, and the first blocks of each wafer are interferentially fitted with recesses formed between adjacent second blocks of an adjacent wafer; wherein the number of the tail portions of the grounding member is the same as that of the first and the second blocks on the opposite sides of the wafer; wherein the tail portions of the grounding member extend through the first blocks of the wafer and the second blocks of the adjacent wafer for electrically connecting with the printed circuit board; wherein the wafer defines a plurality of slots in one side surface thereof, the signal contacts being retained in the slots; wherein the wafer defines a plurality of recesses in the same side surface of the slots of the wafer, and the grounding member has a plurality of contacting legs aligned with the recesses, the contacting portions of the grounding member being formed by the contacting legs for resiliently engaging with a corresponding inserted circuit board; wherein the grounding member has a top flange covering a top edge of the dielectric base, and a plurality of contacting legs extending downwardly from the top flange of the grounding member for facilitating insertion of the circuit board, the contacting portions of the grounding member being formed by the contacting legs; the receptacle further comprises a dielectric housing defining a plurality of parallel channels therein; wherein each circuit board includes a mating portion aligned with a corresponding channel of the dielectric housing; the receptacle further comprises a fastening device fixing the interface connection piece to the housing; wherein the fastening device includes a wall contacting with the interface connection piece and a pair of latches perpendicularly extending from opposite side edges of the wall, each latch having a hook at a free end thereof; wherein the dielectric housing defines a pair of recesses in opposite sides thereof for accommodating the latches of the fastening device, and a pair of cavities recessed from the recesses for locking the hooks therein; the header further comprises a housing and the second interface connection piece is securely received in the housing.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-12-15 2007-06-16 2007-12-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-12-15 2011-06-16 2011-12-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-12-15 2015-06-16 2015-12-16 $7700.00 Window Closed / Lapsed

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