US6599779B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
PBGA substrate for anchoring heat sink
Assignee: Stats Chippac Pte Ltd
•
Filing: 2001-09-24
•
Granted: 2003-07-29
•
Expires: 2021-09-24
Abstract
Abstract In accordance with the objectives of the invention a new method is provided to position and secure a heat sink over the surface of a semiconductor device mounting support, the latter typically being referred to as a semiconductor substrate. A plurality of recesses is created in the surface of the substrate over which the heat sink is to be mounted. The heat sink is (conventionally and not part of the invention) provided with dimples that form the interface between the heat sink and the underlying substrate. The dimples of the heat sink are aligned with and inserted into the recesses that have been created by the invention in the underlying substrate for this purpose, firmly securing the heat sink in position with respect to the substrate.
Inventors
- 👤 Il Kwon Shim
- 👤 Seng Guan Chow
- 👤 Gerry Balanon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:02
CPC Classifications
H; H10; H10W; H10W72/00; H10W40/00; H10W40/20; H10W40/22; H10W40/70; H10W40/77; H10W40/778; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H10W72/071; H10W72/075; H10W72/50; H10W72/551; H10W72/851; H10W72/853; H10W72/865; H10W72/874; H10W72/884; H10W72/90; H10W72/951; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
303 words
A method of creating a Plastic Ball Grid Array package, comprising the steps of: providing a semiconductor device support surface, said semiconductor device support surface having a first and a second surface, said semiconductor device support surface having been provided with a layer of patterned and etched interconnect metal in or on the first and the second surface thereof, at least one of said layers of patterned and etched interconnect metal comprising a point of ground interconnect, at least one opening having been created in said the second surface of said semiconductor device support surface, said at least one opening created in said second surface of said semiconductor device support surface exposing the surface of said at least one point of ground interconnect; providing at least one semiconductor device; positioning said at least one semiconductor device over the second surface of said semiconductor device support surface; connecting said at least one semiconductor device with said at least one layer of patterned and etched interconnect metal provided in or on the surface of said second surface of said semiconductor device support surface; positioning a heat sink over the second surface of said semiconductor device support surface, said heat sink having been provided with dimples forming an interface between said heat sink and said second surface of said semiconductor device support surface; inserting said dimples into said at least one opening having been created in said second surface of said semiconductor device support surface; and applying a mold compound over the second surface of said semiconductor device support surface, said mold compound encasing said at least one semiconductor device in addition to encasing electrical connections provided between said at least one semiconductor device and said layer of patterned and etched interconnect metal provided in or on the second surface of said semiconductor device support surface.
Claim 2
Independent Claim
303 words
A method of creating a Plastic Ball Grid Array package, comprising the steps of: providing a semiconductor device support surface, said semiconductor device support surface having a first and a second surface, said semiconductor device support surface having been provided with a layer of patterned and etched interconnect metal in or on the first and the second surface thereof, at least one of said layers of patterned and etched interconnect metal comprising a point of ground interconnect, at least one opening having been created in said the second surface of said semiconductor device support surface, said at least one opening created in said second surface of said semiconductor device support surface exposing the surface of said at least one point of ground interconnect; providing at least one semiconductor device; positioning said at least one semiconductor device over the second surface of said semiconductor device support surface; connecting said at least one semiconductor device with said at least one layer of patterned and etched interconnect metal provided in or on the surface of said second surface of said semiconductor device support surface; positioning a heat sink over the second surface of said semiconductor device support surface, said heat sink having been provided with dimples forming an interface between said heat sink and said second surface of said semiconductor device support surface; inserting said dimples into said at least one opening having been created in said second surface of said semiconductor device support surface; and applying a mold compound over the second surface of said semiconductor device support surface, said mold compound encasing said at least one semiconductor device in addition to encasing electrical connections provided between said at least one semiconductor device and said layer of patterned and etched interconnect metal provided in or on the second surface of said semiconductor device support surface.
Claim 3
Dependent Claim
20 words
The method of claim 1 , additionally electroplating said exposed surface of said at least one point of ground interconnect.
Claim 4
Dependent Claim
16 words
The method of claim 2 , said electroplating comprising a layer of copper or equivalent metal.
Claim 5
Dependent Claim
26 words
The method of claim 1 , further applying a layer of thermally conductive epoxy over the surface of said at least one point of ground interconnect.
Claim 6
Dependent Claim
18 words
The method of claim 4 , curing said thermally conductive epoxy after application of said thermally conductive epoxy.
Claim 7
Dependent Claim
30 words
The method of claim 1 , said at least one opening being created in said semiconductor device support surface having been created applying methods of laser drilling or plasma drilling.
Claim 8
Dependent Claim
38 words
The method of claim 1 , said at least one opening having been created in said semiconductor device support surface being used for positioning said heat sink dimples over the surface of said Plastic Ball Grid Array substrate.
Claim 9
Dependent Claim
49 words
The method of claim 1 , said at least one opening having been created in said semiconductor device support surface preferably having been created in a perimeter of said Plastic Ball Grid Array substrate, avoiding entrapment of contaminants between a heat sink and said Plastic Ball Grid Array substrate.
Claim 10
Dependent Claim
29 words
The method of claim 1 , said semiconductor device support surface being selected from the group of surfaces consisting of printed circuit boards and flex circuits and ceramic substrates.
Claim 11
Dependent Claim
53 words
The method of claim 1 , additionally providing contact balls over the first surface of said first surface of said semiconductor device support surface, said contact balls being connected to at least one of said patterned and etched layers of interconnect metal in or on the surface of said semiconductor device support surface.
Claim 12
Dependent Claim
57 words
The method of claim 1 , said semiconductor device support surface further having been provided with at least one layer of interconnect metal therein, said at least one layer of patterned and etched interconnect metal being connected to said layers of interconnect metal created over said first and said second surface of said semiconductor device support surface.
References Cited (Backward Citations)
US5641987A
Cited
US6124637A
Cited
US5872395A
Cited
US5834839A
Cited
US6201301B1
Cited
US5977626A
Cited
US6534859B1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-07-28 | 2007-01-27 | 2007-07-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-07-28 | 2011-01-27 | 2011-07-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-07-28 | 2015-01-27 | 2015-07-29 | $7700.00 | Window Closed / Lapsed |