Electronic device

Claim 2

An electronic device comprising: a pair of source signal line driver circuits; a pair of gate signal line driver circuits; and a pixel portion including a plurality of pixels, wherein said plurality of pixels each have an EL element, a pair of EL driver TFTs, a pair of switching TFTs and a pair of eliminating TFTs, wherein luminescence of the EL element is controlled by said pair of EL driver TFTs; wherein one of said pair of EL driver TFTs is controlled by one of said pair of switching TFTs and one of said pair of eliminating TFTs; wherein the other of said pair of EL driver TFTs is controlled by the other of said pair of switching TFTs and the other of said eliminating TFTs; and wherein gray-scale display is performed by controlling luminescence time of said plurality of EL elements.

Claim 3

A device according to claim 1 , wherein said pair of source signal line driver circuits and said pair of gate signal line driver circuits are formed using a TFT on a substrate on which said pixel portion is also formed, and wherein the driving frequency of said pair of source signal line driver circuits is 10 MHZ or more.

Claim 4

A device according to claim 1 , wherein said EL element has a pixel electrode, an opposing electrode, and an EL layer interposed between said pixel electrode and said opposing electrode.

Claim 5

A device according to claim 1 , wherein said device is an EL display device.

Claim 6

A device according to claim 1 , wherein said device is a video camera.

Claim 7

A device according to claim 1 , wherein said device is a head-mount type EL display device.

Claim 8

A device according to claim 1 , wherein said device is a DVD player.

Claim 9

A device according to claim 1 , wherein said device is a head-mount display.

Claim 10

A device according to claim 1 , wherein said device is a personal computer.

Claim 11

A device according to claim 1 , wherein said device is a portable telephone.

Claim 12

A device according to claim 1 , wherein said device is a car audio.

Claim 13

A device according to claim 1 , wherein said pair of source signal line driver circuits and said pair of gate signal line driver circuits are formed using a TFT on a substrate on which said pixel portion is also formed, and wherein the driving frequency of said pair of source signal line driver circuits is 10 MHZ or more.

Claim 14

A device according to claim 1 , wherein said light emitting element has a pixel electrode, an opposing electrode, and an EL layer interposed between said pixel electrode and said opposing electrode.

Claim 15

A device according to claim 1 , wherein said device is one of selected from the group consisting of an EL display device, a video camera, a head-mount type EL display device, a DVD player, a head-mount display, a personal computer, a portable telephone, a car audio.

Claim 16

An electronic device comprising: first and second source signal line driver circuits; first and second gate signal line driver circuits; a pixel portion including a plurality of pixels; a plurality of first source signal lines connected to said first source signal line driver circuit; a plurality of second source signal lines connected to said second source signal line driver circuit; a plurality of first gate signal lines connected to said first gate signal line driver circuit; a plurality of second gate signal lines connected to said second gate signal line driver circuit; and a power supply line, wherein said plurality of pixels each have a first switching TFT, a second switching TFT, a first eliminating TFT, a second eliminating TFT, a first EL driver TFT, a EL second driver TFT, and an EL element; wherein a gate electrode of said first switching TFT is connected to said first gate signal line, wherein a gate electrode of said second switching TFT is connected to said second gate signal line, wherein one of a source region and a drain region of said first switching TFT is connected to said first source signal line, and the other thereof is connected to a gate electrode of said first EL driver TFT, wherein one of a source region and a drain region of said second switching TFT is connected to said second source signal line, and the other thereof is connected to a gate electrode of said second EL driver TFT, wherein a gate electrode of said first eliminating TFT is connected to said first gate signal line, wherein a gate electrode of said second eliminating TFT is connected to said second gate signal line, wherein one of a source region and a drain region of said first eliminating TFT is connected to said power supply line, and the other thereof is connected to said gate electrode of said second EL driver TFT, wherein one of a source region and a drain region of said second eliminating TFT is connected to said power supply line, and the other thereof is connected to said gate electrode of said first EL driver TFT, wherein one of a source region and a drain region of said first EL driver TFT is connected to said power supply line, and the other thereof is connected to said EL element, respectively, and wherein one of a source region and a drain region of said second EL driver TFT is connected to said power supply line,and the other thereof is connected to said EL element, respectively.

Claim 17

An electronic device comprising: first and second source signal line driver circuits; first and second gate signal line driver circuits; a pixel portion including a plurality of pixels; a plurality of first source signal lines connected to said first source signal line driver circuit; a plurality of second source signal lines connected to said second source signal line driver circuit; a plurality of first gate signal lines connected to said first gate signal line driver circuit; a plurality of second gate signal lines connected to said second gate signal line driver circuit; and a power supply line, wherein said plurality of pixels each have a first switching TFT, a second switching TFT, a first eliminating TFT, a second eliminating TFT, a first EL driver TFT, a EL second driver TFT, and an EL element; wherein a gate electrode of said first switching TFT is connected to said first gate signal line, wherein a gate electrode of said second switching TFT is connected to said second gate signal line, wherein one of a source region and a drain region of said first switching TFT is connected to said first source signal line, and the other thereof is connected to a gate electrode of said first EL driver TFT, wherein one of a source region and a drain region of said second switching TFT is connected to said second source signal line, and the other thereof is connected to a gate electrode of said second EL driver TFT, wherein a gate electrode of said first eliminating TFT is connected to said first gate signal line, wherein a gate electrode of said second eliminating TFT is connected to said second gate signal line, wherein one of a source region and a drain region of said first eliminating TFT is connected to said power supply line, and the other thereof is connected to said gate electrode of said second EL driver TFT, wherein one of a source region and a drain region of said second eliminating TFT is connected to said power supply line, and the other thereof is connected to said gate electrode of said first EL driver TFT, wherein one of a source region and a drain region of said first EL driver TFT is connected to said power supply line, and the other thereof is connected to said EL element, respectively, and wherein one of a source region and a drain region of said second EL driver TFT is connected to said power supply line,and the other thereof is connected to said EL element, respectively.

Claim 18

A device according to claim 15 , wherein said first switching TFT and said first eliminating TFT are simultaneously turned ON or OFF, and said second switching TFT and said second eliminating TFT are simultaneously turned ON or OFF.

Claim 19

A device according to claim 15 , wherein each of said first EL driver TFT and said second EL driver TFT becomes an OFF state when an electric potential of said power supply line is applied to said gate electrode of each of said EL driver TFT.

Claim 20

A device according to claim 15 , wherein an (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan and an (n) number of display periods Tr 1 , Tr 2 , . . . , Trn are provided in one frame period; said (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan appear in said order; said (n) number of display periods Tr 1 , Tr 2 , . . . , Trn appear in said order; a time period from the moment at which each of said (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan begins to the moment at which the writing-in period subsequent to said each of said (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan begins corresponds to each of said display periods Tr 1 , Tr 2 , . . . , Trn; a writing-in period which appears subsequently to said writing-in period Tan is a writing-in period Ta 1 ′ which appears first in the next frame period; a display period which appears subsequently to said display period Trn is a display period Tr 1 ′ which appears first in the next frame period; said (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan are divided into an (i) number of writing-in periods (i: an integer equal to or larger than 0 and equal to or smaller than n) and an (n−1) number of writing-in periods; in each of said (i) number of writing-in periods, digital data signals are inputted from said first source signal line driver circuit to all of said plurality of pixels through said first source signal line; in each of said (n−i) number of writing-in periods, digital data signals are inputted from said second source signal line driver circuit to all of said plurality of pixels through said second source signal line; in each of said (i) number of writing-in periods, the digital data signals inputted from said second source signal line driver circuit before said (i) number of writing-in periods are erased from all of said plurality of pixels; in each of said (n−i) number of writing-in periods, the digital data signals inputted from said first source signal line driver circuit before said (n−i) number of writing-in periods are erased from all of said plurality of pixels; adjacent pairs (Ta 1 , Ta 2 ), (Ta 2 , Ta 3 ), . . . , (Ta(n−1), Tan), (Tan, Ta 1 ′) between the group of said (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan and the subsequent group of said (n) number of writing-in periods Ta 2 , Ta 3 , . . . , Ta 1 ′ are divided into a group of a (j) number of adjacent pairs of writing-in periods (j: an integer equal to or greater than 0 and equal to or smaller than (n−1)) and an (n−j) number of adjacent pairs of writing-in periods; in each of said (j) number of adjacent pairs of writing-in periods, the two writing-in periods overlap each other; in each of said (n−j) number of adjacent pairs of writing-in periods, the two writing-in periods do not overlap each other; in one writing-in period in each of said (j) number of adjacent pairs of writing-in periods, the digital data signals are inputted from said first source signal line driver circuit to all of said plurality of pixels and, in the other writing-in period, the digital data signals are inputted from said second source signal line driver circuit to all of said plurality of pixels; in each of said (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan, one of a luminescing state and a non-luminescing state of the EL element of each of said plurality of pixels is selected by the digital data signal inputted to said plurality of pixels; in each of said (n) number of display periods Tr 1 , Tr 2 , . . . , Trn, the EL element of each of said plurality of pixels is set in one of the luminescing state and the non-luminescing state according to the digital data signal; in each of an (m) number of display periods (m: an integer equal to or larger than 0 and equal to or smaller than n) in said (n) number of display periods Tr 1 , Tr 2 , . . . , Trn, all of the EL elements of said plurality of pixels are set in the non-luminescing state; and the length of each of the sums Tr 1 +Tr 2 , Tr 2 +Tr 3 , . . . , Trn+Tr 1 ′ of the lengths of adjacent pairs between the group of said (n) number of display periods Tr 1 , Tr 2 , . . . , Trn and the subsequent group of said (n) number of display periods Tr 2 , Tr 3 , . . . , Tr 1 ′ is equal to or longer than the length of said writing-in periods Ta 1 , Ta 2 , . . . , Tan.

Claim 21

A device according to claim 18 , wherein the proportions of the lengths of said (n−m) number of display periods coincide with the proportions of the lengths of an (n−m) number of periods defined by dividing a (k) number of periods T 1 , T 2 , . . . , Tk (k: an integer equal to or larger than 1 and equal to or smaller than (n−m)) a (n−m−k) number of times, and wherein if said (k) number of periods T 1 , T 2 , . . . , Tk are arranged in increasing order of length, the proportions of the lengths of said (k) number of periods T 1 , T 2 , . . . , Tk can be expressed by 2 0 :2 1 : . . . : 2 0(k−1) .

Claim 22

A device according to claim 18 , the two writing-in periods in at least one of said adjacent pairs of said (n) number of writing-in periods (Ta 1 , Ta 2 ), (Ta 2 , Ta 3 ), . . . , (Tan, Ta 1 ′) overlap each other.

Claim 23

A device according to claim 18 , wherein all the EL elements of said plurality of pixels are set in the non-luminescing state in at least one of said (n) number of display periods Tr 1 , Tr 2 , . . . , Trn.

Claim 24

A device according to claim 18 , wherein none of said (n) number of display periods Tr 1 , Tr 2 , . . . , Trn is set as a period in which all the EL elements of said plurality of pixels are set in the non-luminescing state.

Claim 25

A devic according to claim 18 , wherein the lengths of said (i) number of writing-in periods are equal to each other; and the lengths of said (n−i) number of writing-in periods are equal to each other.

Claim 26

A device according to claim 18 , wherein the lengths of said (n) number of writing-in periods Ta 1 , Ta 2 , . . . , Tan are equal to each other.

Claim 27

A device according to claim 18 , wherein said (i) number of writing-in periods and said (n−i) number of writing-in periods appear alternately.

Claim 28

A device according to claim 18 , wherein, if said (n−m) number of display periods are arranged in increasing order of length, the proportions of the lengths of said (n−m) number of display periods can be expressed by 2 0 :2 1 : . . . :2 (n−m−1) .

Claim 29

A device according to claim 18 , wherein said EL layer is a low molecular type organic material or a polymer organic material.

Claim 30

A device according to claim 27 , wherein said low molecular type organic material comprises Alq 3 (tris-8-quinolilite-aluminum) or TPD (triphenylamine derivative).

Claim 31

A device according to claim 27 , wherein said polymer organic material comprises PPV (polyphenylene vinylene), PVK (polyvinyl carbazole), or polycarbonate.

Claim 32

A device according to claim 18 , wherein said pair of source signal line driver circuits and said pair of gate signal line driver circuits are formed using a TFT on a substrate on which said pixel portion is also formed; and the driving frequency of said pair of source signal line driver circuits is 10 MHZ or more.

Claim 33

A device according to claim 18 , wherein said EL element has a pixel electrode, an opposing electrode, and an EL layer interposed between said pixel electrode and said opposing electrode.

Claim 34

A device according to claim 18 , wherein said EL element has a pixel electrode, an opposing electrode, and an EL layer interposed between said pixel electrode and said opposing electrode; said opposing electrode is maintained at a constant potential; and said power supply line is maintained at a constant potential.

Claim 35

A device according to claim 15 , wherein said device is an EL display device.

Claim 36

A device according to claim 15 , wherein said device is a video camera.

Claim 37

A device according to claim 15 , wherein said device is a head-mount type EL display device.

Claim 38

A device according to claim 15 , wherein said device is a DVD player.

Claim 39

A device according to claim 15 , wherein said device is a head-mount display.

Claim 40

A device according to claim 15 , wherein said device is a personal computer.

Claim 41

A device according to claim 15 , wherein said device is a portable telephone.

Claim 42

A device according to claim 15 , wherein said device is a car audio.

Claim 45

A method according to claim 41 , wherein a second writing-in period Ta 2 begins before the end of a first writing-in period Ta 1 .

Claim 46

A method according to claim 41 , wherein said an electronic device has an EL display device.

Claim 47

A method according to claim 41 , wherein said an electronic device has a liquid crystal display device having a response time of several ten microseconds or shorter.

Claim 50

A method according to claim 45 , wherein each of the sums Tr 1 +Tr 2 , Tr 2 +Tr 3 , . . . , Trn+(initial display period Tr 1 for the next frame) of the adjacent pairs of the display periods be equal to or greater than the length of the corresponding one of the writing-in periods Ta 1 , Ta 2 , . . . , Tan.

Claim 51

A method according to claim 45 , wherein said an electronic device has an EL display device.

Claim 52

A method according to claim 45 , wherein said an electronic device has a liquid crystal display device having a response time of several ten microseconds or shorter.

Claim 53

A display device comprising: a pair of source signal line driver circuits; a pair of gate signal line driver circuits; and a pixel portion including a plurality of pixels, wherein each of said plurality of pixels comprises a light emitting element, a pair of driver TFTs, a pair of switching TFTs and a pair of eliminating TFTs, wherein luminescence of the light emitting element is controlled by said pair of driver TFTs, wherein one of said pair of driver TFTs is controlled by one of said pair of switching TFTs and one of said pair of eliminating TFTs, and wherein the other of said pair of driver TFTs is controlled by the other of said pair of switching TFTs and the other of said eliminating TFTs.

Claim 54

A display device comprising: a pair of source signal line driver circuits; a pair of gate signal line driver circuits; and a pixel portion including a plurality of pixels, wherein each of said plurality of pixels comprises a light emitting element, a pair of driver TFTs, a pair of switching TFTs and a pair of eliminating TFTs, wherein luminescence of the light emitting element is controlled by said pair of driver TFTs, wherein one of said pair of driver TFTs is controlled by one of said pair of switching TFTs and one of said pair of eliminating TFTs, and wherein the other of said pair of driver TFTs is controlled by the other of said pair of switching TFTs and the other of said eliminating TFTs.