← Back to Patent Explorer
US6546056B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Timing recovery in a multi-tone modem

Assignee: HP Inc
•
Filing: 1999-05-28
•
Granted: 2003-04-08
•
Expires: 2019-05-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A timing recovery apparatus for use in a receiver in a multicarrier transmission system is provided. The apparatus includes a receive signal buffer, a pointer register containing an address to a location within the receive signal buffer, a time to frequency domain signal converter, a digital filter, and a control circuit. The signal converter accepts data from the receive signal buffer. The samples that are fed into the converter are determined by an address stored in the pointer register. The digital filter is connected to the converter, and is essentially a bank of single-tap filters. One of the converter outputs corresponds to a pilot tone, and thus the digital filter provides a filtered pilot tone. The phase of the pilot is also examined, preferably by examining the filter tap corresponding to the pilot. The control circuit accepts the pilot phase signal and responsively updates the pointer register. Alternatively, the control circuit updates the pointer register by deriving a phase signal directly from the relevant converter bin.

Inventors

  • 👤 John R. Rosenlof

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 10:29
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/26; H04L27/2601; H04L27/2647; H04L27/2655; H04L27/2662; H04L27/2668; H04L27/2673; H04L27/2675

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 115 words
A timing recovery apparatus for use in a receiver in a multicarrier transmission system, comprising: a receive signal buffer; a pointer register containing an address to a location within said receive signal buffer; a time to frequency domain signal converter accepting blocks of data from said receive signal buffer in response to said pointer register; a digital filter connected to said time to frequency domain converter, said filter having a plurality of single-tap filters, wherein said digital filter provides a: phase error signal; and a control circuit accepting said phase error signal and responsively updating said pointer register when said phase error signal indicates an accumulated timing error equal to at least one sample interval.
Claim 2
Dependent Claim 115 words
A timing recovery apparatus for use in a receiver in a multicarrier transmission system, comprising: a receive signal buffer; a pointer register containing an address to a location within said receive signal buffer; a time to frequency domain signal converter accepting blocks of data from said receive signal buffer in response to said pointer register; a digital filter connected to said time to frequency domain converter, said filter having a plurality of single-tap filters, wherein said digital filter provides a: phase error signal; and a control circuit accepting said phase error signal and responsively updating said pointer register when said phase error signal indicates an accumulated timing error equal to at least one sample interval.
Claim 3
Dependent Claim 19 words
The timing recovery apparatus of claim 1 , wherein said time to frequency domain converter comprises an FFT module.
Claim 4
Dependent Claim 23 words
The timing recovery apparatus of claim 1 , wherein said digital filter updates said plurality of single-tap filters using an adaptive updating algorithm.
Claim 5
Dependent Claim 22 words
The timing recovery apparatus of claim 3 , wherein said adaptive updating algorithm is one of: LMS, second-order LMS, and stochastic gradient.
Claim 6
Dependent Claim 20 words
The timing recovery apparatus of claim 1 , wherein said digital filter comprises a magnitude filter and a phase filter.
Claim 7
Dependent Claim 20 words
The timing recovery apparatus of claim 1 further comprising an interpolation filter for supplying oversampled data to said receive buffer.
Claim 8
Dependent Claim 16 words
The timing recovery apparatus of claim 1 further comprising a correlator for initializing said pointer register.
Claim 9
Dependent Claim 116 words
A timing recovery apparatus for use in a receiver in a multicarrier transmission system, comprising: a receive signal buffer; a pointer register containing an address to a location within said receive signal buffer; a time to frequency domain signal converter accepting blocks of data from said receive signal buffer in response to said pointer register, wherein said signal converter provides a converted signal; a digital filter connected to said signal converter, said filter having a plurality of single-tap filters; and a control circuit accepting said converted signal from the converter and responsively updating said pointer register and said digital filter when said converted signal indicates an accumulated timing error equal to at least one sample interval.
Claim 10
Dependent Claim 116 words
A timing recovery apparatus for use in a receiver in a multicarrier transmission system, comprising: a receive signal buffer; a pointer register containing an address to a location within said receive signal buffer; a time to frequency domain signal converter accepting blocks of data from said receive signal buffer in response to said pointer register, wherein said signal converter provides a converted signal; a digital filter connected to said signal converter, said filter having a plurality of single-tap filters; and a control circuit accepting said converted signal from the converter and responsively updating said pointer register and said digital filter when said converted signal indicates an accumulated timing error equal to at least one sample interval.
Claim 11
Dependent Claim 19 words
The timing recovery apparatus of claim 8 , wherein said time to frequency domain converter comprises an FFT module.
Claim 12
Dependent Claim 23 words
The timing recovery apparatus of claim 8 , wherein said control circuit updates said plurality of single-tap filters using an adaptive updating algorithm.
Claim 13
Dependent Claim 22 words
The timing recovery apparatus of claim 8 , wherein said adaptive updating algorithm is one of: LMS, second-order LMS, and stochastic gradient.
Claim 14
Dependent Claim 18 words
The timing recovery apparatus of claim 8 , wherein said plurality of single-tap filters comprises unit-magnitude filter taps.
Claim 15
Independent Claim 79 words
A method of timing offset compensation in a multitone-modulation receiver, comprising the steps of:. sampling a received multitone signal; converting the sampled signal to complex-valued symbols; determining the phase of an embedded pilot symbol; adjusting the phase of the complex-valued symbols in response to a determined phase error and, adjusting a sample pointer in response to the determined phase error signal when said determined phase error signal indicates an accumulated timing error equal to at least one sample interval.
Claim 16
Independent Claim 79 words
A method of timing offset compensation in a multitone-modulation receiver, comprising the steps of:. sampling a received multitone signal; converting the sampled signal to complex-valued symbols; determining the phase of an embedded pilot symbol; adjusting the phase of the complex-valued symbols in response to a determined phase error and, adjusting a sample pointer in response to the determined phase error signal when said determined phase error signal indicates an accumulated timing error equal to at least one sample interval.
Claim 17
Dependent Claim 22 words
The method of claim 13 wherein the step of adjusting the phase of the complex-valued symbols is performed by a phase equalizer.
Claim 18
Dependent Claim 28 words
The method of claim 14 wherein the step of determining the phase of an embedded pilot symbol includes examining one or more filter taps within the phase equalizer.
Claim 19
Dependent Claim 14 words
The method of claim 13 , wherein the phase equalizer is an adaptive filter.
Claim 20
Dependent Claim 28 words
The method of claim 13 , wherein the step of adjusting the phase of the complex-valued symbols includes rotating the complex-valued symbols using a complex-valued, unit-magnitude, single-tap filter.
Claim 21
Dependent Claim 14 words
The method of claim 13 further comprising the step of initializing the pointer register.
Claim 22
Dependent Claim 22 words
The method of claim 18 wherein the step of initializing the pointer register includes correlating data samples to locate the frame boundary.
Claim 23
Independent Claim 110 words
A method of timing offset compensation in a multitone-modulation receiver, comprising the steps of: sampling a received multitone signal; converting the sampled signal to complex-valued symbols; determining the phase of an embedded pilot symbol having an associated bin number; adjusting the phase of the complex-valued symbols in response to a determined phase error and; adjusting a sample pointer in response to the determined phase error signal when said determined phase error signal indicates an accumulated timing error equal to at least one sample interval wherein the step of adjusting the sample pointer includes the step of examining the pilot bin number, the total number of bins, and the pilot phase.
Claim 24
Independent Claim 110 words
A method of timing offset compensation in a multitone-modulation receiver, comprising the steps of: sampling a received multitone signal; converting the sampled signal to complex-valued symbols; determining the phase of an embedded pilot symbol having an associated bin number; adjusting the phase of the complex-valued symbols in response to a determined phase error and; adjusting a sample pointer in response to the determined phase error signal when said determined phase error signal indicates an accumulated timing error equal to at least one sample interval wherein the step of adjusting the sample pointer includes the step of examining the pilot bin number, the total number of bins, and the pilot phase.
Claim 25
Dependent Claim 44 words
The method of claim 20 wherein the step of adjusting the sample pointer includes the steps of: determining an accumulated change in the pilot phase; and, comparing the accumulated change to 360 degrees times the pilot bin divided by the total number of bins.
Claim 26
Dependent Claim 23 words
A computer readable medium containing instructions that will cause a microprocessor to perform the steps of any of claims 13 through 19 .

References Cited (Backward Citations)

US5657355A Cited
WO1996024207A1 Cited
US5802117A Cited
EP0795984A2 Cited
EP0795977A2 Cited
US5732113A Cited
US5970397A Cited
US6266361B1 Cited
US6310926B1 Cited
US6295317B1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-04-07 2006-10-07 2007-04-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-04-07 2010-10-07 2011-04-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-04-07 2014-10-07 2015-04-08 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag