US6535935B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of sending data streams using a refetchable first-in-first-out memory which is read in a sequence that backs-up
Assignee: Unisys Corp
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Filing: 2000-04-06
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Granted: 2003-03-18
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Expires: 2020-04-06
Abstract
Abstract A stream of data words is sent from a memory thru a controller and an external data buffer to an I/O device by a method which includes the steps of: 1) transferring a segment of the stream of data from the memory into the controller while concurrently sending a subsegment of the segment from the controller thru the data buffer to the I/O device via a transmission burst in which the receipt of individual parts of the subsegment are not acknowledged by the I/O device; 2) receiving a signal in the controller from the I/O device at any time during the sending step, to terminate the transmission burst; 3) subsequently receiving a signal in the controller, from the I/O device, to restart the transmission burst beginning with a selectable part of the last subsegment that was sent; 4) removing from the controller, only the portion of the segment which precedes the selectable part of the subsegment; and, 5) repeating the above steps until the stream of data is received in its entirety by the I/O device. To perform the above steps, the controller includes a refetchable First-In-First-Out memory (RFIFO) into which the segments are written in a cyclic sequence and from which the subsegments are read in the same sequence except that read sequence backs up.
Inventors
- 👤 Lewis Rossland Carlson
- 👤 II John James Carver
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 20:33
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4027; G06F13/405; G06F13/4059
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
171 words
A method of sending a stream of data from a memory thru a controller to an I/O device which is coupled to said controller thru a data buffer; said method including the steps of: transferring a segment of said stream of data from said memory into said controller while concurrently sending a subsegment of said segment from said controller thru said data buffer to said I/O device via a transmission burst in which the receipt of individual parts of said subsegment are not acknowledged by said I/O device; receiving a signal in said controller, from said I/O device at any time during said sending step, to terminate said transmission burst; subsequently receiving a signal in said controller, from said I/O device, to restart said transmission burst beginning with a selectable part of said subsegment; removing from said controller, only the portion of said segment which precedes said selectable part of said subsegment; and, repeating the above steps until said stream of data is received in its entirety by said I/O device.
Claim 2
Independent Claim
171 words
A method of sending a stream of data from a memory thru a controller to an I/O device which is coupled to said controller thru a data buffer; said method including the steps of: transferring a segment of said stream of data from said memory into said controller while concurrently sending a subsegment of said segment from said controller thru said data buffer to said I/O device via a transmission burst in which the receipt of individual parts of said subsegment are not acknowledged by said I/O device; receiving a signal in said controller, from said I/O device at any time during said sending step, to terminate said transmission burst; subsequently receiving a signal in said controller, from said I/O device, to restart said transmission burst beginning with a selectable part of said subsegment; removing from said controller, only the portion of said segment which precedes said selectable part of said subsegment; and, repeating the above steps until said stream of data is received in its entirety by said I/O device.
Claim 3
Dependent Claim
72 words
A method according to claim 1 wherein said controller includes a refetchable first-in-first-out memory (RFIFO) and, a) writes said segment into said RFIFO in a first cyclic sequence, and b) reads said subsegment from said RFIFO in a second sequence which is the same as said first sequence except that the second sequence backs-up in response to said signal to restart said transmission burst beginning with a selectable part of said subsegment.
Claim 4
Dependent Claim
76 words
A method according to claim 2 wherein said controller maintains a first address which points to the beginning of said segment in said RFIFO, maintains a second address which points to the end of said segment in said RFIFO, and performs said removing step by changing said first address in response to said signal to restart such that said first address points to the part of said subsegment which was selected by said signal to restart.
Claim 5
Dependent Claim
32 words
A method according to claim 3 wherein during said sending step, said controller maintains a third address which identifies the part of said segment which is currently being sent in said subsegment.
Claim 6
Dependent Claim
37 words
A method according to claim 1 wherein said stream of data is stored in said memory as a data chain which includes multiple data blocks with each data block starting in said memory at a different address.
Claim 7
Dependent Claim
22 words
A method according to claim 1 wherein said stream of data words is stored in said memory as a single data block.
Claim 8
Dependent Claim
34 words
A method according to claim 1 wherein said data buffer is in a bridge which is intercoupled between said controller and said I/O device, and said sending step sends each subsegment thru said bridge.
Claim 9
Dependent Claim
42 words
A method according to claim 1 wherein said data buffer is in an I/O bus adapter for said I/O device which is intercoupled between said controller and said I/O device, and said sending step sends each subsegment thru said I/O bus adapter.
Claim 10
Dependent Claim
40 words
A method according to claim 1 wherein said data buffer is in an output module for said controller which is intercoupled between said controller and said I/O device, and said sending step sends each subsegment thru said I/O output module.
Claim 11
Dependent Claim
22 words
A method according to claim 1 wherein each subsegment from said controller is sent on a PCI bus to said I/O device.
Claim 12
Dependent Claim
26 words
A method according to claim 1 wherein said controller stops said transmission burst, on its own, by sending a signal to terminate to said I/O device.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-03-17 | 2006-09-16 | 2007-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-03-17 | 2010-09-16 | 2011-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-03-17 | 2014-09-16 | 2015-03-18 | $7700.00 | Window Closed / Lapsed |