US6535185B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Active driving circuit for display panel
Assignee: LG Display Co Ltd
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Filing: 2001-03-05
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Granted: 2003-03-18
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Expires: 2021-03-05
Abstract
Abstract An active driving circuit for a display panel includes first to fourth transistors, a capacitor, a constant current source, and a capacitor. The first transistor is connected with a positive power source. The second transistor has a common gate terminal together with the first transistor and a mirror circuit against the first transistor. Also, the second transistor is turned on by a common gate signal applied to the common gate terminal to supply the positive power source to a display device. The third transistor sets a saturated threshold voltage for the common gate terminal by allowing the first transistor and the second transistor to constitute a mirror circuit against each other in accordance with a scan line signal. The constant current source supplies a current with a ground one side and controlled by a gray signal of a data line. The fourth transistor sets the common gate voltage corresponding to the controlled current of the constant current source by the scan line signal. The capacitor accumulates charges corresponding to the difference between the positive power source and the common gate voltage.
Inventors
- 👤 Hak Su Kim
- 👤 Oh Kyong Kwon
- 👤 Young Sun Na
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:49
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/30; G09G3/32; G09G3/3208; G09G3/3225; G09G3/3233; G09G3/3241; G09G2300/00; G09G2300/08; G09G2300/0809; G09G2300/0842; G09G2310/00; G09G2310/02; G09G2310/0243; G09G2310/0251; G09G2320/00; G09G2320/02; G09G2320/0252; G09G2330/00; G09G2330/04
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
177 words
An active driving circuit for a display panel comprising: a first transistor connected with a positive power source; a second transistor having a common gate terminal together with the first transistor and a mirror circuit against the first transistor, turned on by a common gate signal applied to the common gate terminal to supply the positive power source to a display device; a third transistor for setting a saturated threshold voltage for the common gate terminal by allowing the first transistor and the second transistor to constitute a mirror circuit against each other, when it is turned on by a scan line signal; a constant current source for supplying a current with a ground one side and controlled by a gray signal of a data line; a fourth transistor turned on by the scan line signal subsequent to the third transistor, for supplying the common gate voltage corresponding to the controlled current of the constant current source; and a capacitor for accumulating charges corresponding to the difference between the positive power source and the common gate voltage.
Claim 2
Dependent Claim
177 words
An active driving circuit for a display panel comprising: a first transistor connected with a positive power source; a second transistor having a common gate terminal together with the first transistor and a mirror circuit against the first transistor, turned on by a common gate signal applied to the common gate terminal to supply the positive power source to a display device; a third transistor for setting a saturated threshold voltage for the common gate terminal by allowing the first transistor and the second transistor to constitute a mirror circuit against each other, when it is turned on by a scan line signal; a constant current source for supplying a current with a ground one side and controlled by a gray signal of a data line; a fourth transistor turned on by the scan line signal subsequent to the third transistor, for supplying the common gate voltage corresponding to the controlled current of the constant current source; and a capacitor for accumulating charges corresponding to the difference between the positive power source and the common gate voltage.
Claim 3
Dependent Claim
36 words
The active driving circuit for a display panel of claim 1 , further comprising an init connected between the active driving circuit and the display device, for initially supplying a constant current to the display device.
Claim 4
Dependent Claim
47 words
The active driving circuit for a display panel of claim 1 , further comprising a diode for protecting a voltage, which is connected between the active driving circuit and the display device to prevent an anode of the display device from being lowered below a constant voltage.
Claim 5
Dependent Claim
23 words
The active driving circuit for a display panel of claim 1 , wherein the first to fourth transistors are PMOS or NMOS transistors.
Claim 6
Dependent Claim
36 words
The active driving circuit for a display panel of claim 1 , further comprising a negative power source connected with a cathode of the display device, for controlling the intensity of light-emission of the display device.
Claim 7
Dependent Claim
23 words
The active driving circuit for a display panel of claim 1 , wherein the display device is an active matrix organic electrodluminescence (AMOEL).
Claim 8
Dependent Claim
49 words
The active driving circuit for a display panel of claim 1 , wherein a ratio of width/length of the first transistor to width/length of the second transistor is proportional to a ratio of a current supplied to the display device to the controlled current of the constant current source.
Claim 9
Dependent Claim
43 words
The active driving circuit for a display panel of claim 1 , wherein the first transistor is not operated as the mirror circuit against the second transistor when the third transistor and the fourth transistor are turned off by the scan line signal.
Claim 10
Dependent Claim
24 words
The active driving circuit for a display panel of claim 1 , wherein the constant current source is included in a driving integrated circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-03-17 | 2006-09-16 | 2007-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-03-17 | 2010-09-16 | 2011-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-03-17 | 2014-09-16 | 2015-03-18 | $7700.00 | Window Closed / Lapsed |