US6534788B1
Expired / Lapsed
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Thin film transistor having dual gate structure and a fabricating method thereof
Assignee: LG Display Co Ltd
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Filing: 1999-07-30
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Granted: 2003-03-18
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Expires: 2019-07-30
Abstract
Abstract The present invention relates to a thin film transistor and a fabricating method thereof, wherein the source and drain wires are located on a substrate and a double gate structure is provided, whereby the driving capacity of on-current is improved and the degradation of a device is reduced. The TFT includes a substrate, a source electrode, a drain electrode and a lower gate electrode on the substrate, a buffer layer covering an exposed surface of the substrate as well as the source, drain and lower gate electrodes. An active layer is formed on the buffer layer, wherein a source region, a drain region, lightly-doped (LD) regions and a channel region are formed in the active layer. A gate insulating layer is formed on the channel and LD regions. An upper gate electrode is then formed on the gate insulating layer over the channel region. A passivation layer then covers the upper gate electrode. A plurality of contact holes are formed in the buffer and passivation layers, wherein the contact holes expose the source and drain electrodes and the source and drain regions. A first interconnection wire connects the source electrode to the source region. A second interconnection wire connects the drain electrode to the drain region.
Inventors
- 👤 Ju-Cheon Yeo
- 👤 Hong-Seok Choi
- 👤 Yong-Min Ha
- 👤 Sang-Gul Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 20:53
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6729; H10D30/673; H10D30/6733; H10D30/6734
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
82 words
A thin film transistor, comprising: a substrate; a source electrode, a drain electrode and a lower gate electrode formed on the substrate; a buffer layer covering the source, drain and lower gate electrodes; an active layer formed on the buffer layer, wherein a source region, a drain region and a channel region are formed in the active layer; a gate insulating layer formed on the channel region; and an upper gate electrode formed on the gate insulating layer over the channel region.
Claim 2
Dependent Claim
82 words
A thin film transistor, comprising: a substrate; a source electrode, a drain electrode and a lower gate electrode formed on the substrate; a buffer layer covering the source, drain and lower gate electrodes; an active layer formed on the buffer layer, wherein a source region, a drain region and a channel region are formed in the active layer; a gate insulating layer formed on the channel region; and an upper gate electrode formed on the gate insulating layer over the channel region.
Claim 3
Dependent Claim
71 words
The thin film transistor according to claim 1 , further comprising: a passivation layer covering the upper gate electrode; a plurality of contact holes in the buffer and passivation layers, wherein the contact holes expose the source and drain electrodes and the source and drain regions; a first interconnection wire connecting the source electrode to the source region; and a second interconnection wire connecting the drain electrode to the drain region.
Claim 4
Dependent Claim
17 words
The thin film transistor according to claim 1 , wherein the active layer includes a lightly-doped region.
Claim 5
Dependent Claim
18 words
The thin film transistor according to claim 3 , wherein the gate insulating layer covers the lightly-doped region.
Claim 6
Dependent Claim
24 words
The thin film transistor according to claim 3 , wherein the lower gate electrode is extended to underlie the channel and the lightly-doped regions.
Claim 7
Dependent Claim
25 words
The thin film transistor according to claim 3 , wherein the lower gate electrode comprises two sub-gate electrodes, each of which underlies the lightly-doped region.
Claim 8
Dependent Claim
23 words
The thin film transistor according to claim 3 , wherein each one of the source electrode and the drain electrode comprises double layers.
Claim 9
Dependent Claim
31 words
The thin film transistor according to claim 7 , wherein each one of the source and drain electrodes has a clad structure in which an upper layer covers a lower layer.
Claim 10
Dependent Claim
37 words
The thin film transistor according to claim 8 , wherein the lower layer of the source and drain electrodes is an Al layer and the upper layer of the source and drain electrodes is an Mo layer.
Claim 11
Dependent Claim
23 words
The thin film transistor according to claim 1 , wherein each one of the source electrode and the drain electrode comprises double layers.
Claim 12
Dependent Claim
31 words
The thin film transistor according to claim 10 , wherein each one of the source and drain electrodes has a clad structure in which an upper layer covers a lower layer.
Claim 13
Dependent Claim
37 words
The thin film transistor according to claim 11 , wherein the lower layer of the source and drain electrodes is an Al layer and the upper layer of the source and drain electrodes is an Mo layer.
Claim 14
Dependent Claim
29 words
The thin film transistor according to claim 1 , wherein the lower gate electrode is made of the same material as upper layers of the source and drain electrodes.
Claim 15
Dependent Claim
97 words
A thin film transistor, comprising: a substrate; a source electrode and a drain electrode formed on the substrate; a buffer layer covering an exposed surface of the substrate including the source and drain electrodes; an active layer having a source region, a drain region, lightly-doped regions and a channel region on the buffer layer, a lightly doped region juxtaposed to the drain region which is partially overlapping, but insulated from, the drain electrode; a gate insulating layer on the channel and lightly-doped regions; and an upper gate electrode on the gate insulating layer over the channel region.
Claim 16
Dependent Claim
97 words
A thin film transistor, comprising: a substrate; a source electrode and a drain electrode formed on the substrate; a buffer layer covering an exposed surface of the substrate including the source and drain electrodes; an active layer having a source region, a drain region, lightly-doped regions and a channel region on the buffer layer, a lightly doped region juxtaposed to the drain region which is partially overlapping, but insulated from, the drain electrode; a gate insulating layer on the channel and lightly-doped regions; and an upper gate electrode on the gate insulating layer over the channel region.
Claim 17
Dependent Claim
72 words
The thin film transistor according to claim 14 , further comprising: a passivation layer covering the upper gate electrode; a plurality of contact holes formed in the buffer and passivation layers, wherein the contact holes expose the source and drain electrodes and the source and drain regions; a first interconnection wire connecting the source electrode to the source region; and a second interconnection wire connecting the drain electrode to the drain region.
Claim 18
Dependent Claim
22 words
The thin film transistor according to claim 14 , wherein the gate electrode partially overlays, but is insulated from, the drain electrode.
Claim 19
Dependent Claim
23 words
The thin film transistor according to claim 14 , wherein each one of the source electrode and the drain electrode comprises double layers.
Claim 20
Dependent Claim
30 words
The thin film transistor according to claim 17 , wherein each one of the source and drain electrodes has a structure in which an upper layer covers a lower layer.
Claim 21
Dependent Claim
31 words
The thin film transistor according to claim 18 , wherein the lower layer is an Al layer and the upper layer is an Mo layer in the source and drain electrodes.
Claim 22
Dependent Claim
195 words
A liquid crystal display, comprising: a substrate; a first thin film transistor, the first thin film transistor comprising: a source electrode and a drain electrode on the substrate; a buffer layer covering an exposed surface of the substrate and the source and drain electrodes; an active layer on the buffer layer, wherein a source region, a drain region, lightly-doped regions and a channel region are formed in the active layer; and a gate insulating layer on the channel and lightly-doped regions; a gate electrode on the gate insulating layer over the channel region; a second thin film transistor, the second thin film transistor comprising: a source electrode, a drain electrode and a lower gate electrode on the substrate; a buffer layer covering an exposed surface of the substrate and the source, drain and lower gate electrodes; an active layer on a predetermined portion of the buffer layer, wherein a source region, a drain region, lightly-doped regions and a channel region are formed in the active layer; and a gate insulating layer on the channel and lightly-doped regions in the active layer; and an upper gate electrode on the gate insulating layer over the channel region.
Claim 23
Dependent Claim
195 words
A liquid crystal display, comprising: a substrate; a first thin film transistor, the first thin film transistor comprising: a source electrode and a drain electrode on the substrate; a buffer layer covering an exposed surface of the substrate and the source and drain electrodes; an active layer on the buffer layer, wherein a source region, a drain region, lightly-doped regions and a channel region are formed in the active layer; and a gate insulating layer on the channel and lightly-doped regions; a gate electrode on the gate insulating layer over the channel region; a second thin film transistor, the second thin film transistor comprising: a source electrode, a drain electrode and a lower gate electrode on the substrate; a buffer layer covering an exposed surface of the substrate and the source, drain and lower gate electrodes; an active layer on a predetermined portion of the buffer layer, wherein a source region, a drain region, lightly-doped regions and a channel region are formed in the active layer; and a gate insulating layer on the channel and lightly-doped regions in the active layer; and an upper gate electrode on the gate insulating layer over the channel region.
Claim 24
Dependent Claim
107 words
The liquid crystal display of claim 20 , further comprising: a passivation layer covering the first and second thin film transistors; a plurality of contact holes exposing the source and drain electrodes and the source and drain regions of the first and second thin film transistors, respectively; a pixel electrode connecting the drain electrode of the first thin film transistor to the drain region of the first thin film transistor; a first interconnection wire connecting the source electrode to the source region in the second thin film transistor; and a second interconnection wire connecting the drain electrode to the drain region of the second thin film transistor.
Claim 25
Dependent Claim
27 words
The liquid crystal display according to claim 21 , wherein the pixel electrode and the first and second interconnection wires are each made of the same material.
Claim 26
Dependent Claim
48 words
The liquid crystal display according to claim 20 , wherein the buffer layer of the first thin film transistor is made of the same material as that of the buffer layer of the second thin film transistor, and wherein the buffer layers are formed from the same layer.
References Cited (Backward Citations)
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| 3.5 Years (Year 4) | 2006-03-17 | 2006-09-16 | 2007-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-03-17 | 2010-09-16 | 2011-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-03-17 | 2014-09-16 | 2015-03-18 | $7700.00 | Window Closed / Lapsed |