US6489645B1
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Integrated circuit device including a layered superlattice material with an interface buffer layer
Assignee: Panasonic Holdings Corp
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Filing: 2001-07-03
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Granted: 2002-12-03
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Expires: 2021-07-03
Abstract
Abstract An integrated circuit memory device includes a thin film layered superlattice material layer and an electrode. An interface buffer layer is formed between said thin film layered superlattice material layer and said electrode. The interface buffer layer is selected from the group consisting of: 1) simple oxides, not including bismuth, of an A-site or a B-site metal; and 2) second layered superlattice materials different from the first layered superlattice material and containing at least one A-site or B-site metal that is the same as an A-site or B-site metal in the first layered superlattice material. The oxide not including bismuth can be a complex oxide including a plurality of metals or a simple oxide including only one metal. Most preferably, the interface buffer layer is selected from the group consisting of strontium tantalate, bismuth tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals.
Inventors
- 👤 Kiyoshi Uchiyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 12:01
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6938; H10P14/69398; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D1/684; H10P14/65; H10P14/6516; H10P14/6544
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
108 words
An integrated circuit device including a substrate supporting a first thin film layered superlattice material layer and an electrode, comprising an interface buffer layer interposed between said thin film layered superlattice material layer and said electrode, said interface buffer layer selected from the group consisting of: simple oxides of an A-site or a B-site metal, said simple oxide of an A-site or B-site metal not including an oxide of bismuth; and a second layered superlattice material different from said first layered superlattice material and containing at least one A-site or B-site metal that is the same as an A-site or B-site metal in said first layered superlattice material.
Claim 2
Dependent Claim
108 words
An integrated circuit device including a substrate supporting a first thin film layered superlattice material layer and an electrode, comprising an interface buffer layer interposed between said thin film layered superlattice material layer and said electrode, said interface buffer layer selected from the group consisting of: simple oxides of an A-site or a B-site metal, said simple oxide of an A-site or B-site metal not including an oxide of bismuth; and a second layered superlattice material different from said first layered superlattice material and containing at least one A-site or B-site metal that is the same as an A-site or B-site metal in said first layered superlattice material.
Claim 3
Dependent Claim
55 words
An integrated circuit as in claim 1 wherein said interface buffer layer is selected from the group consisting of: strontium tantalate, bismuth tantalate, strontium niobium tantalate, strontium bismuth tantalate niobate, titanium oxide, and tantalum pentoxide, other simple oxides of A-site and B-site metals, and other simple oxides of one or more A-site or B-site metals.
Claim 4
Dependent Claim
17 words
An integrated circuit as in claim 2 , wherein said interface buffer layer further includes a dopant.
Claim 5
Dependent Claim
29 words
An integrated circuit as in claim 3 wherein said dopant comprises a metal that is the same as a superlattice generator metal in said thin film layered superlattice material.
Claim 6
Dependent Claim
18 words
An integrated circuit device as in claim 1 wherein said thin film layered superlattice material layer comprises bismuth.
Claim 7
Dependent Claim
41 words
An integrated circuit device as in claim 5 wherein said thin film layered superlattice material layer comprises a material selected from the group consisting of strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth niobium tantalate, bismuth titanate, and bismuth lanthanum titanate.
Claim 8
Dependent Claim
32 words
An integrated circuit device as in claim 1 wherein said electrode is a top electrode, said top electrode being remote from said substrate relative to said thin film layered superlattice material layer.
Claim 9
Dependent Claim
25 words
An integrated circuit device as in claim 7 and including a bottom electrode interposed between said thin film layered superlattice material layer and said substrate.
Claim 10
Dependent Claim
16 words
An integrated circuit device as in claim 1 wherein said interface buffer layer comprises strontium tantalate.
Claim 11
Dependent Claim
16 words
An integrated circuit device as in claim 1 wherein said interface buffer layer comprises bismuth tantalate.
Claim 12
Dependent Claim
17 words
An integrated circuit device as in claim 1 wherein said interface buffer layer comprises strontium niobium tantalate.
Claim 13
Dependent Claim
18 words
An integrated circuit device as in claim 11 wherein said layered superlattice material comprises strontium bismuth niobium tantalate.
Claim 14
Dependent Claim
18 words
An integrated circuit device as in claim 1 wherein said interface buffer layer comprises strontium bismuth tantalum niobate.
Claim 15
Dependent Claim
18 words
An integrated circuit device as in claim 13 wherein said first layered superlattice material comprises strontium bismuth tantalate.
Claim 16
Dependent Claim
16 words
An integrated circuit device as in claim 1 wherein said interface buffer layer comprises tantalum pentoxide.
Claim 17
Dependent Claim
26 words
An integrated circuit device as in claim 1 wherein said interface buffer layer comprises titanium oxide and said thin film layered superlattice material comprises bismuth titanate.
Claim 18
Dependent Claim
29 words
An integrated circuit device as in claim 1 wherein said interface buffer layer comprises lanthanum doped titanium oxide and said thin film layered superlattice material comprises bismuth lanthanum titanate.
Claim 19
Dependent Claim
32 words
An integrated circuit device as in claim 1 wherein said electrode is a bottom electrode, said bottom electrode being interposed between said first thin film layered superlattice material layer and said substrate.
Claim 20
Dependent Claim
23 words
An integrated circuit device as in claim 1 wherein said interface buffer layer has a thickness ranging from 3 nm to 30 nm.
Claim 21
Dependent Claim
23 words
An integrated circuit device as in claim 19 wherein said interface buffer layer has a thickness ranging from 5 nm to 20 nm.
Claim 22
Dependent Claim
16 words
An integrated circuit device as in claim 1 wherein said integrated circuit is an electronic memory.
Claim 23
Dependent Claim
14 words
An integrated circuit device as in claim 1 wherein said device comprises a capacitor.
Claim 24
Dependent Claim
15 words
An integrated circuit device as in claim 1 wherein said device comprises a ferroelectric FET.
Claim 25
Dependent Claim
51 words
An integrated circuit device as in claim 1 wherein said first layered superlattice material comprises strontium bismuth tantalum niobate or strontium bismuth tantalate, and said second layered superlattice material comprises strontium bismuth tantalum niobate in which the amount of niobium exceeds the amount of niobium in said first layered superlattice material.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2005-12-02 | 2006-06-03 | 2006-12-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-12-02 | 2010-06-03 | 2010-12-03 | $3760.00 | Window Closed / Lapsed |
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