US6484232B2
Expired / Lapsed
US
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Adaptive calibration technique for high speed memory devices
Assignee: Mosaid Technologies Inc
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Filing: 2000-11-30
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Granted: 2002-11-19
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Expires: 2020-11-30
Abstract
Abstract A computer system with high-speed memory devices includes one or more temperature sensors and/or environmental sensors that monitor environmental parameters that may affect the operation of the high-speed memory devices. The sensor values are provided to control logic in a memory controller that can intelligently modify the operation of the memory devices in response to changing environmental conditions. Thus, in response to deteriorating environmental conditions, the memory controller may increase the frequency of calibration cycles. The sensors may be provided on multiple channels, if the memory system is configured with multiple channels, or may be individually associated with memory devices. In addition, the memory controller also monitors the expected remaining life of the memory devices, and the number of errors occurring in the memory devices, and based on these parameters, may change the frequency of the calibration cycles.
Inventors
- 👤 Sompong P. Olarig
- 👤 John E. Jenne
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 13:15
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/06; G06; G06F; G06F13/00; G06F13/14; G06F13/16; G06F13/1668; G06F13/1694; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/4078; G11C5/02; G11C5/04; G11C7/00; G11C7/04; G11C7/10; G11C7/1015; G11C7/1045; G11C7/1072; G11C2207/00; G11C2207/22; G11C2207/2254
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
79 words
A computer system, comprising: a CPU; a memory controller coupled to said CPU; a system memory coupled to said memory controller, with said memory controller controlling and formatting transactions to the system memory; wherein said memory controller runs calibration cycles to said system memory to re-calibrate said system memory, and wherein said memory controller is capable of varying the frequency of said calibration cycles based on at least one parameter that may affect the operation of the system memory.
Claim 2
Dependent Claim
79 words
A computer system, comprising: a CPU; a memory controller coupled to said CPU; a system memory coupled to said memory controller, with said memory controller controlling and formatting transactions to the system memory; wherein said memory controller runs calibration cycles to said system memory to re-calibrate said system memory, and wherein said memory controller is capable of varying the frequency of said calibration cycles based on at least one parameter that may affect the operation of the system memory.
Claim 3
Dependent Claim
55 words
The system of claim 1 , further comprising an environmental sensor that couples to said memory controller to provide a signal to said memory controller representing at least one environmental parameter, and wherein said memory controller is capable of changing the frequency of the calibration cycles in response to the signal from said environmental sensor.
Claim 4
Dependent Claim
15 words
The system of claim 2 , wherein the calibration cycles comprise a temperature calibration cycle.
Claim 5
Dependent Claim
15 words
The system of claim 2 , wherein the calibration cycles comprise a current calibration cycle.
Claim 6
Dependent Claim
16 words
The system of claim 2 , wherein said environmental sensor comprises at least one temperature sensor.
Claim 7
Dependent Claim
27 words
The system of claim 5 , wherein the system memory comprises a plurality of RDRAM devices, and wherein said temperature sensor is located adjacent said RDRAM devices.
Claim 8
Dependent Claim
23 words
The system of claim 6 , further comprising a second environmental sensor located adjacent said RDRAM devices to measure a second environmental parameter.
Claim 9
Dependent Claim
59 words
The system of claim 7 , wherein the second environmental sensor measures humidity in the vicinity of the RDRAM devices, and provides a signal indicating humidity in the vicinity of the RDRAM devices to said memory controller, and wherein said memory controller is capable of changing the frequency of said calibration cycles in response to a change in humidity.
Claim 10
Dependent Claim
27 words
The system of claim 5 , wherein the system memory comprises a plurality of RDRAM devices, and wherein said temperature sensor is located adjacent said RDRAM devices.
Claim 11
Dependent Claim
32 words
The system of claim 5 , wherein the system memory comprises a plurality of RDRAM devices arranged in multiple channels, and wherein at least one temperature sensor is associated with each channel.
Claim 12
Dependent Claim
28 words
The system of claim 10 , further comprising a second environmental sensor associated with each channel to measure a second environmental parameter in the vicinity of each channel.
Claim 13
Dependent Claim
20 words
The system of claim 1 , wherein said at least one parameter includes the remaining life of said RDRAM devices.
Claim 14
Dependent Claim
20 words
The system of claim 1 , wherein said at least one parameter includes the error profile of said system memory.
Claim 15
Dependent Claim
35 words
The system of claim 13 , wherein said system memory comprises a plurality of RDRAM memory devices, and said error profile indicates the number of memory errors that have occurred in said RDRAM memory devices.
Claim 16
Dependent Claim
38 words
The system of claim 13 , wherein said system memory includes a plurality of RDRAM memory devices arranged in multiple channels, and said error profile indicates the number of memory errors that have occurred in a particular channel.
Claim 17
Dependent Claim
32 words
The system of claim 1 , wherein said system memory includes one or more RDRAM devices, and said at least one parameter includes the temperature in the vicinity of the RDRAM devices.
Claim 18
Dependent Claim
62 words
The system of claim 1 , wherein said system memory includes a plurality of high-speed DRAM memory devices arranged in channels, with an environmental sensor associated with each channel, and said memory controller includes control logic that modifies the frequency of said calibration cycles in a channel in response to the environmental parameter detected by said environmental sensor associated with that channel.
Claim 19
Dependent Claim
14 words
The system of claim 17 , wherein said environmental sensor comprises a temperature sensor.
Claim 20
Dependent Claim
14 words
The system of claim 17 , wherein the environmental sensor comprises a humidity sensor.
Claim 21
Dependent Claim
63 words
The system of claim 1 , wherein said system memory includes a plurality of high-speed DRAM memory devices, and said memory controller monitors the expected life of the DRAM memory devices, the number of memory errors occurring in the DRAM memory devices, and the temperature in the vicinity of the DRAM devices, in determining whether to change the frequency of the calibration cycles.
Claim 22
Dependent Claim
33 words
The system of claim 20 , wherein the memory controller also monitors another environmental condition in the vicinity of the DRAM devices in determining whether to change the frequency of the calibration cycles.
Claim 23
Dependent Claim
12 words
The system of claim 21 , wherein the environmental condition comprises humidity.
Claim 24
Dependent Claim
14 words
The system of claim 20 , wherein the environmental condition comprises a light parameter.
Claim 25
Dependent Claim
101 words
A computer system, comprising: a CPU; a system memory comprising a plurality of high-speed DRAM memory devices coupled to said CPU; a memory controller coupling said system memory to said CPU, said memory controller controlling and formatting transactions to the DRAM memory devices, and wherein said memory controller monitors an operating condition that may affect the operation of said DRAM memory devices; and wherein said memory controller periodically runs calibration cycles to said DRAM memory devices, and wherein said memory controller modifies the frequency of at least one of said calibration cycles in response to a change in the operating condition.
Claim 26
Dependent Claim
101 words
A computer system, comprising: a CPU; a system memory comprising a plurality of high-speed DRAM memory devices coupled to said CPU; a memory controller coupling said system memory to said CPU, said memory controller controlling and formatting transactions to the DRAM memory devices, and wherein said memory controller monitors an operating condition that may affect the operation of said DRAM memory devices; and wherein said memory controller periodically runs calibration cycles to said DRAM memory devices, and wherein said memory controller modifies the frequency of at least one of said calibration cycles in response to a change in the operating condition.
Claim 27
Dependent Claim
17 words
The system of claim 24 , wherein said high-speed DRAM memory devices comprise Direct RDRAM memory devices.
Claim 28
Dependent Claim
15 words
The system of claim 24 , wherein the calibration cycles comprise a temperature calibration cycle.
Claim 29
Dependent Claim
15 words
The system of claim 24 , wherein the calibration cycles comprise a current calibration cycle.
Claim 30
Dependent Claim
27 words
The system of claim 24 , wherein said memory controller measures the operating condition via signals received from an environmental sensor positioned adjacent said DRAM memory devices.
Claim 31
Dependent Claim
25 words
The system of claim 28 , wherein said environmental sensor includes a plurality of temperature sensors, with a separate temperature associated with each RDRAM device.
Claim 32
Dependent Claim
27 words
The system of claim 28 , wherein said memory controller measures the operating condition via signals received from a second environmental sensor located adjacent said DRAM devices.
Claim 33
Dependent Claim
32 words
The system of claim 28 , wherein the memory controller includes a Rambus interface module and a timer, and wherein said interface module runs calibration cycles periodically as indicated by said timer.
Claim 34
Dependent Claim
38 words
The system of claim 31 , wherein the memory controller further includes control logic that receives signals from a temperature sensor, and in response, changes the value in said timer to vary the frequency of the calibration cycle.
Claim 35
Dependent Claim
33 words
The system of claim 32 , wherein said memory controller further comprises an analog-to-digital converter that converts the signal from said temperature signal to a digital value for processing by said control logic.
Claim 36
Dependent Claim
32 words
The system of claim 28 , wherein the system memory comprises a plurality of RDRAM devices arranged in multiple channels, and wherein at least one temperature sensor is associated with each channel.
Claim 37
Dependent Claim
21 words
The system of claim 28 , wherein said operating condition includes the expected remaining life of each of said DRAM devices.
Claim 38
Dependent Claim
21 words
The computer system of claim 28 , wherein said operating condition includes the number of errors occurring said DRAM memory devices.
Claim 39
Dependent Claim
129 words
A computer system, comprising: a CPU; a memory controller coupled to said CPU; a video controller coupled to said memory controller; an I/O controller hub coupled to said memory controller, said I/O controller hub connecting to at least one peripheral bus for coupling to a peripheral device; a system memory comprised of multiple DRAM memory devices coupled to said memory controller, with said memory controller controlling and formatting transactions to the DRAM memory devices originating from said CPU and other computer system components, including said peripheral device; wherein said memory controller runs calibration cycles to said DRAM memory devices to re-calibrate said memory devices, and wherein said memory controller is capable of varying the frequency of said calibration cycles based on an error profile of said DRAM memory devices.
Claim 40
Dependent Claim
129 words
A computer system, comprising: a CPU; a memory controller coupled to said CPU; a video controller coupled to said memory controller; an I/O controller hub coupled to said memory controller, said I/O controller hub connecting to at least one peripheral bus for coupling to a peripheral device; a system memory comprised of multiple DRAM memory devices coupled to said memory controller, with said memory controller controlling and formatting transactions to the DRAM memory devices originating from said CPU and other computer system components, including said peripheral device; wherein said memory controller runs calibration cycles to said DRAM memory devices to re-calibrate said memory devices, and wherein said memory controller is capable of varying the frequency of said calibration cycles based on an error profile of said DRAM memory devices.
Claim 41
Dependent Claim
134 words
A computer system, comprising: a CPU; a memory controller coupled to said CPU; a video controller coupled to said memory controller; an I/O controller hub coupled to said memory controller, said I/O controller hub connecting to at least one peripheral bus for coupling to a peripheral device; a system memory comprised of multiple DRAM memory device coupled to said memory controller, with said memory controller controlling and formatting transactions to the DRAM memory devices originating from said CPU and other computer system components, including said peripheral device; wherein said memory controller runs calibration cycles to said DRAM memory devices to re-calibrate said memory devices, and wherein said memory controller is capable of varying the frequency of said calibration cycles based on the expected remaining life of at least one of said DRAM memory devices.
Claim 42
Dependent Claim
134 words
A computer system, comprising: a CPU; a memory controller coupled to said CPU; a video controller coupled to said memory controller; an I/O controller hub coupled to said memory controller, said I/O controller hub connecting to at least one peripheral bus for coupling to a peripheral device; a system memory comprised of multiple DRAM memory device coupled to said memory controller, with said memory controller controlling and formatting transactions to the DRAM memory devices originating from said CPU and other computer system components, including said peripheral device; wherein said memory controller runs calibration cycles to said DRAM memory devices to re-calibrate said memory devices, and wherein said memory controller is capable of varying the frequency of said calibration cycles based on the expected remaining life of at least one of said DRAM memory devices.
References Cited (Backward Citations)
US5084791A
Cited
US6373768B2
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-11-18 | 2006-05-20 | 2006-11-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-11-18 | 2010-05-20 | 2010-11-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-11-18 | 2014-05-20 | 2014-11-19 | $7700.00 | Window Closed / Lapsed |