Semiconductor catalytic layer and atomic layer deposition thereof

Claim 2

A semiconductor comprising: a semiconductor substrate; a dielectric layer formed on a region of the semiconductor substrate; an opening in the dielectric layer, the opening defined by walls of the dielectric layer and exposing a conductive area in the semiconductor; a barrier layer over the dielectric layer in the opening, including along the walls, and in conductive contact with the conductive area; a catalytic layer having an atomic thickness, the catalytic layer over and bonded to the barrier layer a seed layer of conductive material over and bonded to the catalytic layer; and a conductive layer in over the seed layer and bonded to the seed layer; the conductive layer substantially filling the opening.

Claim 3

The semiconductor as claimed in claim 1 wherein the catalytic layer has an atomic thickness below 100 Å.

Claim 4

The semiconductor as claimed in claim 1 wherein the catalytic layer is a plurality of islands having atomic thicknesses between 1.5 and 100 Å.

Claim 5

The semiconductor as claimed in claim 1 wherein the catalytic layer contains a material selected from a group consisting of Group IB and VIIIB materials.

Claim 6

The semiconductor as claimed in claim 1 wherein the barrier layer contains a material selected from a group consisting of Group IVB, VB, and VIB materials.

Claim 7

The semiconductor as claimed in claim 1 wherein the seed layer contains a Group IB material.

Claim 8

A semiconductor comprising: a semiconductor substrate; a dielectric layer formed on a region of the semiconductor substrate; an opening in the dielectric layer, the opening defined by walls of the dielectric layer and exposing a conductive area in the semiconductor; a barrier layer in direct contact with and bonded to the dielectric layer in the opening, including along the walls, and in conductive contact with the conductive area; a catalytic layer having an atomic thickness deposited by atomic layer epitaxy, the catalytic layer over and bonded to the barrier layer a seed layer of conductive material over and bonded to the catalytic layer; and a conductive layer in direct contact with and bonded to the seed layer, the conductive layer substantially filling the opening.

Claim 9

A semiconductor comprising: a semiconductor substrate; a dielectric layer formed on a region of the semiconductor substrate; an opening in the dielectric layer, the opening defined by walls of the dielectric layer and exposing a conductive area in the semiconductor; a barrier layer in direct contact with and bonded to the dielectric layer in the opening, including along the walls, and in conductive contact with the conductive area; a catalytic layer having an atomic thickness deposited by atomic layer epitaxy, the catalytic layer over and bonded to the barrier layer a seed layer of conductive material over and bonded to the catalytic layer; and a conductive layer in direct contact with and bonded to the seed layer, the conductive layer substantially filling the opening.

Claim 10

The semiconductor as claimed in claim 7 wherein the catalytic layer has an atomic thickness below 100 Å.

Claim 11

The semiconductor as claimed in claim 7 wherein the catalytic layer is a plurality of islands having atomic thicknesses between 1.5 and 100 Å.

Claim 12

The semiconductor as claimed in claim 7 wherein the catalytic layer contains a material selected from a group consisting of copper, nickel, cobalt, palladium, compounds thereof, and combinations thereof.

Claim 13

The semiconductor as claimed in claim 7 wherein the barrier layer contains a material selected from a group consisting of titanium, tantalum, tungsten, their nitrides, compounds thereof, and combinations thereof.

Claim 14

The semiconductor as claimed in claim 7 wherein the seed layer contains a material selected from a group consisting of copper-base alloys, gold, gold-base alloys, silver, silver-base alloys, and combinations thereof.