Semiconductor device

Claim 1

A semiconductor device comprising: a printed circuit board having a plurality of electrically conductive pads on an upper surface thereof; a first semiconductor chip mounted on said printed circuit board; a second semiconductor chip mounted on said first semiconductor chip so as to be displaced in a perpendicular direction from a centerline of said first semiconductor chip, said second semiconductor chip having a length in said perpendicular direction smaller than said first semiconductor chip, and a first area of said first semiconductor chip which is not covered by said second semiconductor chip in said perpendicular direction being smaller than a second area of said first semiconductor chip which is not covered by said second semiconductor chip in a direction contrary to said perpendicular direction; first electrode pads arranged along both sides of said first semiconductor chip on said first area and said second area, said both sides of said first semiconductor chip being apart from each other in said perpendicular direction; second electrode pads arranged along both sides of said second semiconductor chip, said both sides of said second semiconductor chip being apart from each other in said perpendicular direction; a plurality of relay terminals arranged along a side on said second area of said first semiconductor chip; first metal wires connecting said first electrode pads and said electrically conductive pads; second metal wires connecting said electrically conductive pads and said second electrode pads which are arranged along a side of said second semiconductor chip in said perpendicular direction; third metal wires connecting said electrically conductive pads and said relay terminals; fourth metal wires connecting said relay terminals and said second electrode pads which are arranged along a side of said second semiconductor chip in a direction contrary to said special direction; and external terminals, protruding from a lower surface of said printed circuit board and connected to said electrically conductive pads, wherein said electrically conductive pads are arranged corresponding to said first electrode pads and said second electrode pads and wherein no relay terminals are arranged along a side on said first area of said first semiconductor chip.