US6441660B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed, wide bandwidth phase locked loop
Assignee: Broadcom Corp
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Filing: 2001-04-11
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Granted: 2002-08-27
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Expires: 2021-04-11
Abstract
Abstract A PLL may include a voltage regulator for providing a regulated voltage to one or more PLL components (e.g. a charge pump, a voltage controlled oscillator, etc.). The PLL components may be noise sensitive components, and the regulated voltage may reduce noise received from the power supply. Additionally, a level shifter may be coupled between the PLL components and a phase/frequency detector. The level shifter may be supplied by the regulated voltage from the voltage detector. In another implementation, a PLL may include a programmable charge pump and a programmable loop filter. For example, the reference current to the charge pump may be changed, thus changing the rate at which the charge pump can change an output voltage (the control voltage to a voltage controlled oscillator in the PLL). The loop filter components may be changed to change the frequency ranges filtered by the loop filter.
Inventors
- 👤 Joseph M. Ingino, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 12:11
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; H03L7/0995; H03K; H03K17/00; H03K17/22; H03K17/223; H03K3/00; H03K3/02; H03K3/027; H03K3/03; H03K3/0315; H03L7/085; H03L7/089; H03L7/0891; H03L7/0895; H03L7/0896; H03L7/0898; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262; G05F3/30; H03L7/093; H03L7/16; H03L7/18
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
57 words
A phase locked loop (PLL) comprising: a voltage regulator configured to provide a regulated voltage; a phase/frequency detector supplied by a second voltage different from the regulated voltage; one or more PLL components supplied by the regulated voltage; and a level shifter coupled between the phase/frequency detector and the PLL components and supplied by the regulated voltage.
Claim 2
Dependent Claim
57 words
A phase locked loop (PLL) comprising: a voltage regulator configured to provide a regulated voltage; a phase/frequency detector supplied by a second voltage different from the regulated voltage; one or more PLL components supplied by the regulated voltage; and a level shifter coupled between the phase/frequency detector and the PLL components and supplied by the regulated voltage.
Claim 3
Dependent Claim
22 words
The PLL as recited in claim 1 wherein the level shifter isolates the PLL components from noise in the second voltage domain.
Claim 4
Dependent Claim
54 words
The PLL as recited in claim 1 wherein the PLL components comprise a charge pump, and wherein the phase/frequency detector is configured to provide Up and Down signals to control the charge pump, and wherein the level shifter shifts the Up and Down signals from the second voltage domain into the regulated voltage domain.
Claim 5
Dependent Claim
37 words
The PLL as recited in claim 3 wherein the PLL components further include a voltage controlled oscillator coupled to the charge pump, wherein a control voltage for the voltage controlled oscillator is supplied by the charge pump.
Claim 6
Dependent Claim
32 words
The PLL as recited in claim 4 further comprising one or more frequency divide circuits coupled to the voltage controlled oscillator, wherein the frequency divide circuits are supplied by the second voltage.
Claim 7
Dependent Claim
37 words
The PLL as recited in claim 5 wherein an output of the frequency divide circuits is coupled as an input to the phase/frequency detector, and wherein the phase/frequency detector is further coupled to receive a reference clock.
Claim 8
Independent Claim
64 words
A method comprising: supplying a regulated voltage to one or more phase locked loop (PLL) components; supplying a second voltage different from the regulated voltage to a phase/frequency detector of the PLL; and isolating the PLL components from the phase/frequency detector with a level shifter which also shifts an output of the phase/frequency detector from the second voltage domain to the regulated voltage domain.
Claim 9
Independent Claim
64 words
A method comprising: supplying a regulated voltage to one or more phase locked loop (PLL) components; supplying a second voltage different from the regulated voltage to a phase/frequency detector of the PLL; and isolating the PLL components from the phase/frequency detector with a level shifter which also shifts an output of the phase/frequency detector from the second voltage domain to the regulated voltage domain.
Claim 10
Dependent Claim
58 words
A carrier medium comprising a database representing: a voltage regulator configured to provide a regulated voltage; a phase/frequency detector supplied by a second voltage different from the regulated voltage; one or more PLL components supplied by the regulated voltage; and a level shifter coupled between the phase/frequency detector and the PLL components and supplied by the regulated voltage.
Claim 11
Dependent Claim
58 words
A carrier medium comprising a database representing: a voltage regulator configured to provide a regulated voltage; a phase/frequency detector supplied by a second voltage different from the regulated voltage; one or more PLL components supplied by the regulated voltage; and a level shifter coupled between the phase/frequency detector and the PLL components and supplied by the regulated voltage.
Claim 12
Dependent Claim
23 words
The carrier medium as recited in claim 8 wherein the level shifter isolates the PLL components from noise in the second voltage domain.
Claim 13
Dependent Claim
55 words
The carrier medium as recited in claim 8 wherein the PLL components include a charge pump, and wherein the phase/frequency detector is configured to provide Up and Down signals to control the charge pump, and wherein the level shifter shifts the Up and Down signals from the second voltage domain into the regulated voltage domain.
Claim 14
Dependent Claim
38 words
The carrier medium as recited in claim 10 wherein the PLL components further include a voltage controlled oscillator coupled to the charge pump, wherein a control voltage for the voltage controlled oscillator is supplied by the charge pump.
Claim 15
Dependent Claim
36 words
The carrier medium as recited in claim 11 wherein the database further represents one or more frequency divide circuits coupled to the voltage controlled oscillator, wherein the frequency divide circuits are supplied by the second voltage.
Claim 16
Dependent Claim
38 words
The carrier medium as recited in claim 12 wherein an output of the frequency divide circuits is coupled as an input to the phase/frequency detector, and wherein the phase/frequency detector is further coupled to receive a reference clock.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-08-26 | 2006-02-25 | 2006-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-08-26 | 2010-02-25 | 2010-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-08-26 | 2014-02-25 | 2014-08-27 | $7700.00 | Window Closed / Lapsed |