US6441491B1
Expired / Lapsed
US
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Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device containing the same
Assignee: Intel Corp
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Filing: 2001-01-25
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Granted: 2002-08-27
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Expires: 2021-01-25
Abstract
Abstract A method for fabricating a thermally stable ultralow dielectric constant film comprising Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition ("PECVD") process is disclosed. Electronic devices containing insulating layers of thermally stable ultralow dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, cyclic siloxanes and organic molecules containing ring structures, for instance, tetramethylcyclotetrasiloxane and cyclopentene oxide.
Inventors
- 👤 Alfred Grill
- 👤 David R. Medeiros
- 👤 Vishnubhai V. Patel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 02:37
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; C; C23; C23C; C23C16/00; C23C16/22; C23C16/30; C23C16/40; C23C16/401; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6339; H10P14/65; H10P14/6502; H10P14/6506; H10P14/6516; H10P14/6548; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/47; H10P14/6336; H10P14/66; H10P14/665; H10P14/668; H10P14/6681; H10P14/6684; H10P14/6686
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
161 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material formed of an ultralow-k material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; and a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material comprising said ultralow-k material, said third layer of insulating material being in intimate contact with said second layer of insulating material.
Claim 2
Dependent Claim
161 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material formed of an ultralow-k material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; and a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material comprising said ultralow-k material, said third layer of insulating material being in intimate contact with said second layer of insulating material.
Claim 3
Dependent Claim
29 words
The electronic structure according to cliam 1 , further comprising a dielectric cap layer situated between said second layer of insulating material and said third layer of insulating material.
Claim 4
Dependent Claim
29 words
The electronic structure according to cliam 1 , further comprising a dielectric cap layer situated between said second layer of insulating material and said third layer of insulating material.
Claim 5
Dependent Claim
46 words
The electronic structure according to claim 2 , wherein said dielectric cap layer is formed of a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, refractory metal silicon nitride, silicon carbide, silicon carbo-oxide, and carbon doped oxides and their hydrogen-containing compounds.
Claim 6
Dependent Claim
29 words
The electronic structure according to claim 3 , wherein said refractory metal silicon nitride includes a refractory metal selected from the group consisting of Ta, Zr, Hf and W.
Claim 7
Dependent Claim
43 words
The electronic structure according to cliam 1 , further comprising: a first dielectric-cap layer between said second layer of insulating material and said third layer of insulating material; and a second dielectric cap layer on top of said third layer of insulating material.
Claim 8
Dependent Claim
43 words
The electronic structure according to cliam 1 , further comprising: a first dielectric-cap layer between said second layer of insulating material and said third layer of insulating material; and a second dielectric cap layer on top of said third layer of insulating material.
Claim 9
Dependent Claim
52 words
The electronic structure according to claim 5 , wherein said first dielectric cap layer and said second dielectric cap layer are formed of a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, refractory metal silicon nitride, silicon carbide, silicon carbo-oxide, carbon doped oxides and their hydrogen-containing compounds.
Claim 10
Dependent Claim
29 words
The electronic structure according to claim 6 , wherein said refractory metal silicon nitride includes a refractory metal selected from the group consisting of Ta, Zr, Hf and W.
Claim 11
Dependent Claim
40 words
The electronic structure according to claim 1 , wherein said first layer of insulating material is one selected from the group consisting of silicon oxide, silicon nitride, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), and other doped varieties of these materials.
Claim 12
Dependent Claim
37 words
The electronic structure according to claim 1 , further comprising: a diffusion barrier layer of a dielectric material deposited on at least one of said second layer of insulating material and said third layer of insulating material.
Claim 13
Dependent Claim
44 words
The electronic structure according to claim 1 , further comprising: a dielectric reactive ion etching (RIE) hard mask/polish stop layer on top of said second layer of insulating material, and a dielectric diffusion barrier layer on top of said RIE hard mask/polish stop layer.
Claim 14
Dependent Claim
79 words
The electronic structure according to claim 1 , further comprising: a first dielectric RIE hard mask/polish stop layer on top of said second layer of insulating material; a first dielectric diffusion barrier layer on top of said first dielectric RIE hard mask/polish stop layer; a second dielectric RIE hard mask/polish stop layer on top of said third layer of insulating material; and a second dielectric diffusion barrier layer on top of said second dielectric RIE hard mask/polish stop layer.
Claim 15
Dependent Claim
30 words
The electronic structure according to claim 11 , further comprising: a dielectric cap layer between an interlevel dielectric of an ultralow-k material and an intralevel dielectric of an ultralow-k material.
Claim 16
Dependent Claim
131 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; and at least one first region of conductor embedded in at least one second layer of insulating material formed of an ultralow-k material, said ultralow-k material consisting essentially of Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8, one of said at least one second layer of insulating material being in intimate contact with said first layer of insulating material, one of said at least one first region of conductor being in electrical communication with said first region of metal.
Claim 17
Dependent Claim
131 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; and at least one first region of conductor embedded in at least one second layer of insulating material formed of an ultralow-k material, said ultralow-k material consisting essentially of Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8, one of said at least one second layer of insulating material being in intimate contact with said first layer of insulating material, one of said at least one first region of conductor being in electrical communication with said first region of metal.
Claim 18
Dependent Claim
26 words
The electronic structure according to cliam 13 , further comprising: a dielectric cap layer situated between each said at least one second layer of insulating material.
Claim 19
Dependent Claim
26 words
The electronic structure according to cliam 13 , further comprising: a dielectric cap layer situated between each said at least one second layer of insulating material.
Claim 20
Dependent Claim
45 words
The electronic structure according to claim 14 , wherein said dielectric cap layer is formed of a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, refractory metal silicon nitride, silicon carbide, silicon carbo-oxide, carbon doped oxides and their hydrogen-containing compounds.
Claim 21
Dependent Claim
29 words
The electronic structure according to claim 15 , wherein said refractory metal silicon nitride includes a refractory metal selected from the group consisting of Ta, Zr, Hf and W.
Claim 22
Dependent Claim
43 words
The electronic structure according to claim 13 , further comprising: a first dielectric cap layer between each of said at least one second layer of insulating material; and a second dielectric cap layer on top of said topmost second layer of insulating material.
Claim 23
Dependent Claim
26 words
The electronic structure according to claim 17 , wherein said first dielectric cap layer and said second dielectric cap layer are formed of an ultralow-k material.
Claim 24
Dependent Claim
27 words
The electronic structure according to cliam 17 , wherein said first dielectric cap layer and said second dielectric cap layer are formed of a modified ultralow-k material.
Claim 25
Dependent Claim
27 words
The electronic structure according to cliam 17 , wherein said first dielectric cap layer and said second dielectric cap layer are formed of a modified ultralow-k material.
Claim 26
Dependent Claim
201 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; a first dielectric cap layer between said second layer of insulating material and said third layer of insulating material, and a second dielectric cap layer on top of said third layer of insulating material wherein said first and said second dielectric cap layers are formed of an ultralow-k dielectric material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 27
Dependent Claim
201 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; a first dielectric cap layer between said second layer of insulating material and said third layer of insulating material, and a second dielectric cap layer on top of said third layer of insulating material wherein said first and said second dielectric cap layers are formed of an ultralow-k dielectric material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 28
Dependent Claim
181 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; and a diffusion barrier layer formed of a material comprising an ultralow-k dielectric material deposited on at least one of said second layer and said third layer of insulating material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 29
Dependent Claim
181 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; and a diffusion barrier layer formed of a material comprising an ultralow-k dielectric material deposited on at least one of said second layer and said third layer of insulating material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 30
Dependent Claim
203 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; a reactive ion etching (RIE) hard mask/polish stop layer on top of said second layer of insulating material, and a diffusion barrier layer on top of said RIE hard mask/polish stop layer, wherein said RIE hard mask/polish stop layer and said diffusion barrier layer are formned of a an ultralow-k dielectric material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 31
Dependent Claim
203 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed semiconducting substrate having a first region of metal embedded in a first layer of insulating material; a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; a reactive ion etching (RIE) hard mask/polish stop layer on top of said second layer of insulating material, and a diffusion barrier layer on top of said RIE hard mask/polish stop layer, wherein said RIE hard mask/polish stop layer and said diffusion barrier layer are formned of a an ultralow-k dielectric material, said ultralow-k material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 32
Dependent Claim
230 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed: semiconducting substrate having a first region of metal embedded in a first layer of insulating material, a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; a first RIE hard mask/polish stop layer on top of said second layer of insulating material; a first diffusion barrier layer on top of said first RIE hard mask/polish stop layer; a second RIE hard mask/polish stop layer on top of said third layer of insulating material; and a second diffusion barrier layer on top of said second RIE hard mask/polish stop layer, wherein said RIE hard mask/polish stop layers and said diffusion barrier layers are formed of a ultralow-k dielectric material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 33
Dependent Claim
230 words
An electronic structure having layers of insulating material as intralevel or interlevel dielectrics in a wiring structure comprising: a pre-processed: semiconducting substrate having a first region of metal embedded in a first layer of insulating material, a first region of conductor embedded in a second layer of insulating material, said second layer of insulating material being in intimate contact with said first layer of insulating material, said first region of conductor being in electrical communication with said first region of metal; a second region of conductor being in electrical communication with said first region of conductor and being embedded in a third layer of insulating material, said third layer of insulating material being in intimate contact with said second layer of insulating material; a first RIE hard mask/polish stop layer on top of said second layer of insulating material; a first diffusion barrier layer on top of said first RIE hard mask/polish stop layer; a second RIE hard mask/polish stop layer on top of said third layer of insulating material; and a second diffusion barrier layer on top of said second RIE hard mask/polish stop layer, wherein said RIE hard mask/polish stop layers and said diffusion barrier layers are formed of a ultralow-k dielectric material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 34
Dependent Claim
34 words
The electronic structure according to claim 23 , further comprising a dielectric cap layer formed of a material comprising said ultralow-k dielectric material situated between an interlevel dielectric layer and an intralevel dielectric layer.
Claim 35
Dependent Claim
38 words
An ultralow-k dielectric material for use in an electronic device, said ultralow-dielectric material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
Claim 36
Dependent Claim
38 words
An ultralow-k dielectric material for use in an electronic device, said ultralow-dielectric material comprising Si, C, O and H, and a multiplicity of nanometer-sized pores, said ultralow-k material having a dielectric constant of not more than about 2.8.
References Cited (Backward Citations)
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