Method of making higher impedance traces on a low impedance circuit board

Claim 2

A circuit board, comprising: a conductive reference plane; a signal trace, said signal trace formed over said conductive reference plane; a plurality of voids formed in said conductive reference plane, said plurality of voids located beneath said signal trace; and a signal return path, said signal return path located on said conductive reference plane, wherein said plurality of voids is located such that a length of said signal return path is shorter than or substantially equal to the length of said signal trace, wherein said signal return is located in between said plurality of voids to minimize a loop area.

Claim 3

The circuit board of claim 1 , wherein said plurality of voids are filled with insulation.

Claim 4

The circuit board of claim 1 , wherein said signal trace is a zigzagged trace having a plurality of corners, wherein said plurality of corners of said zigzagged trace are located over said plurality of voids.

Claim 5

The circuit board of claim 1 , further comprising an insulating layer layered between said signal trace and said conductive reference plane.

Claim 6

The circuit board of claim 1 , wherein said conductive reference plane is a ground plane.

Claim 7

The circuit board of claim 1 , wherein said conductive reference plane is a power plane.

Claim 8

The circuit board of claim 1 , wherein said plurality of voids are circular.

Claim 9

The circuit board of claim 1 , wherein said signal trace is a video signal trace.

Claim 10

The circuit board of claim 1 , wherein value of said signal trace has an impedance of 75 ohm.

Claim 11

A circuit board, comprising: a first conductive reference plane, said first conductive reference plane having a first plurality of voids formed therein; a first signal trace having a first impedance, said first signal trace formed over said first conductive reference plane; a second signal trace formed over said first plurality of voids in said first conductive reference plane so that said second signal trace has a second impedance, wherein said second impedance is higher than said first impedance; and a signal return path, said signal return path located on said second conductive reference plane, wherein said plurality of voids is located such that a length of said signal return path is shorter than or substantially equal to the length of said signal trace, wherein said signal return is located in between said plurality of voids to minimize a loop area.

Claim 12

A circuit board, comprising: a first conductive reference plane, said first conductive reference plane having a first plurality of voids formed therein; a first signal trace having a first impedance, said first signal trace formed over said first conductive reference plane; a second signal trace formed over said first plurality of voids in said first conductive reference plane so that said second signal trace has a second impedance, wherein said second impedance is higher than said first impedance; and a signal return path, said signal return path located on said second conductive reference plane, wherein said plurality of voids is located such that a length of said signal return path is shorter than or substantially equal to the length of said signal trace, wherein said signal return is located in between said plurality of voids to minimize a loop area.

Claim 13

The circuit board of claim 10 , further comprising: a second conductive reference plane formed over said first signal trace and second signal trace so that said first and second signal trace are located in between said first and second conductive reference plane, said second conductive reference plane to have a second plurality of voids formed over said second signal trace.

Claim 14

The circuit board of claim 11 , wherein said second plurality of voids are circular.

Claim 15

The circuit board of claim 10 , further comprising a first insulating layer layered in between said first signal trace and first conductive reference plane.

Claim 16

The circuit board of claim 10 , further comprising a second insulation layer layered in between said first signal trace and said second conductive reference plane.

Claim 17

The circuit board of claim 10 , wherein said second signal trace is a zigzagged trace having a plurality of corners, wherein said plurality of corners of said zigzagged trace are located over said first plurality of voids and under said second plurality of voids.

Claim 18

The circuit board of claim 10 , wherein said first plurality of voids are circular.

Claim 19

The circuit board of claim 10 , wherein said second signal trace is a video signal trace.

Claim 20

The circuit board of claim 10 , wherein said first signal trace has said first impedance of 60 ohms and said second signal trace has said second impedance of 75 ohms.

Claim 21

The circuit board of claim 10 , wherein said first signal trace and said second trace signal are separated in respect to each other to avoid any EMI or cross-talk, wherein said first signal trace and said plurality of voids are separated in respect to each other so that said plurality of voids does not affect said first impedance of said first signal trace.

Claim 22

A circuit board, comprising: a first conductive reference plane; a signal trace, said signal trace located over said first conductive reference plane; a second conductive reference plane; said second conductive reference plane located over said signal trace such that said signal trace is located in between said first and second conductive reference plane; a first plurality of voids formed in said first conductive reference plane, said first plurality of voids located beneath said signal trace; a second plurality of voids formed in said second conductive reference plane, said second plurality of voids located over said signal trace; and a signal return path, said signal return path located on said second conductive reference plane, wherein said plurality of voids is located such that a length of said signal return path is shorter than or substantially equal to the length of said signal trace, wherein said signal return is located in between said plurality of voids to minimize a loop area.

Claim 23

A circuit board, comprising: a first conductive reference plane; a signal trace, said signal trace located over said first conductive reference plane; a second conductive reference plane; said second conductive reference plane located over said signal trace such that said signal trace is located in between said first and second conductive reference plane; a first plurality of voids formed in said first conductive reference plane, said first plurality of voids located beneath said signal trace; a second plurality of voids formed in said second conductive reference plane, said second plurality of voids located over said signal trace; and a signal return path, said signal return path located on said second conductive reference plane, wherein said plurality of voids is located such that a length of said signal return path is shorter than or substantially equal to the length of said signal trace, wherein said signal return is located in between said plurality of voids to minimize a loop area.

Claim 24

The circuit board of claim 20 , wherein said signal trace is a zigzagged trace having a plurality of comers such that said plurality of corners of said zigzagged trace is located beneath said first plurality of voids and over second plurality of voids.

Claim 25

The circuit board of claim 20 , wherein said conductive reference plane is a ground plane.

Claim 26

The circuit board of claim 20 , wherein said conductive reference plane is a power plane.

Claim 27

The circuit board of claim 20 , wherein said plurality of voids are circular.

Claim 28

The circuit board of claim 20 , wherein said signal trace is a video signal trace.

Claim 29

The circuit board of claim 20 , wherein value of said signal trace has an impedance of 75 ohm.

Claim 30

A circuit board, comprising: a conductive reference plane; a signal trace, said signal trace formed over said conductive reference plane, wherein said signal trace is a zigzagged trace having a plurality of comers; a plurality of voids formed in said conductive reference plane, said plurality of voids located beneath said signal trace such that said plurality of comers of said zigzagged trace is located over said plurality of voids; and a signal return path, said signal return path located on said conductive reference plane, wherein said plurality of voids is located such that a length of said signal return path is shorter than or substantially equal to the length of said signal trace, wherein said signal return is located in between said plurality of voids to minimize a loop area.

Claim 31

A circuit board, comprising: a conductive reference plane; a signal trace, said signal trace formed over said conductive reference plane, wherein said signal trace is a zigzagged trace having a plurality of comers; a plurality of voids formed in said conductive reference plane, said plurality of voids located beneath said signal trace such that said plurality of comers of said zigzagged trace is located over said plurality of voids; and a signal return path, said signal return path located on said conductive reference plane, wherein said plurality of voids is located such that a length of said signal return path is shorter than or substantially equal to the length of said signal trace, wherein said signal return is located in between said plurality of voids to minimize a loop area.

Claim 32

The circuit board of claim 27 , wherein said plurality of voids are filled with insulation.

Claim 33

The circuit board of claim 27 , wherein said return path having a length of said return path and said signal trace with zigzagged pattern being substantially equal to avoid EMI or cross-talk.