US6356154B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
FET-based, linear voltage-controlled resistor for wide-band gain control circuit
Assignee: Credence Systems Corp
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Filing: 2000-07-06
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Granted: 2002-03-12
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Expires: 2020-07-06
Abstract
Abstract A gain control circuit for generating a differential output signal in response to a differential input signal with a gain controlled by an input control signal employs two asymmetric field effect transistors (FETs) as a linear, voltage-controlled resistor. The FETs are interconnected drain-to-source with the control signal being applied to their gates so that their combined channel current is a substantially linear and symmetric function of the input control signal voltage. The gain control circuit includes two bipolar transistors, with the differential input signal being applied across their bases and the differential output signal being developed across their collectors. A resistor links the emitters of the two transistors, sources are applied to the emitters, and a pair of resistors links each collector to a source of bias voltage. The FET-based voltage-controlled resistor may be connected either between the collectors or between the emitters of the two transistors. When connected between the collectors, output signal distortion due to any input signal common mode component is reduced.
Inventors
- 👤 Thor Hallen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 18:09
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/4508; H03F3/45098; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/007; H03F2203/00; H03F2203/45; H03F2203/45702
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
145 words
An apparatus for conducting a load current in response to an input signal, the apparatus having a resistance controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node, the input signal being applied across the first and second circuit nodes; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; and a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to the third circuit node, wherein said first and second FETs conduct said load current between said first and second circuit nodes, and wherein said first and second FETs are substantially similar.
Claim 2
Independent Claim
145 words
An apparatus for conducting a load current in response to an input signal, the apparatus having a resistance controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node, the input signal being applied across the first and second circuit nodes; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; and a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to the third circuit node, wherein said first and second FETs conduct said load current between said first and second circuit nodes, and wherein said first and second FETs are substantially similar.
Claim 3
Dependent Claim
34 words
The apparatus in accordance with claim 1 wherein said first and second FETs are substantially asymmetric FETs such that said load current is a function of both magnitude and polarity of said input signal.
Claim 4
Dependent Claim
18 words
The apparatus in accordance with claim 2 wherein 30 said first and second FETs are ring dot FETs.
Claim 5
Independent Claim
175 words
An apparatus for generating a differential output signal in response to a differential input signal with a gain controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to-the third circuit node; a first transistor having an emitter connected to said first circuit node, and having a base and a collector; a second transistor having an emitter connected to said second circuit node, and having a base and a collector; wherein said differential input signal is applied across the bases of said first and second transistors, and wherein said differential output signal is developed across the collectors of said first and second transistors.
Claim 6
Independent Claim
175 words
An apparatus for generating a differential output signal in response to a differential input signal with a gain controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to-the third circuit node; a first transistor having an emitter connected to said first circuit node, and having a base and a collector; a second transistor having an emitter connected to said second circuit node, and having a base and a collector; wherein said differential input signal is applied across the bases of said first and second transistors, and wherein said differential output signal is developed across the collectors of said first and second transistors.
Claim 7
Dependent Claim
55 words
The apparatus in accordance with claim 4 further comprising: a fourth circuit node; a first resistor connected between the collector of said first transistor and said fourth circuit node, a second resistor connected between the collector of said second transistor and said fourth circuit node, and a voltage source connected to said fourth circuit node.
Claim 8
Dependent Claim
41 words
The apparatus in accordance with claim 5 further comprising: a third resistor connected between said first and second circuit nodes, a first current source connected to said first circuit node, and a second current source connected to said second circuit, node.
Claim 9
Dependent Claim
16 words
The apparatus in accordance with claim 4 wherein said first and second FETs are substantially similar.
Claim 10
Dependent Claim
17 words
The apparatus in accordance with claim 7 wherein said first and second FETs are substantially asymmetric FETs.
Claim 11
Dependent Claim
17 words
The apparatus in accordance with claim 8 wherein said first and second FETs are ring dot FETs.
Claim 12
Dependent Claim
16 words
The apparatus in accordance with claim 6 wherein said first and second FETs are substantially similar.
Claim 13
Dependent Claim
17 words
The apparatus in accordance with claim 10 wherein said first and second FETs are substantially asymmetric FETs.
Claim 14
Dependent Claim
17 words
The apparatus in accordance with claim 11 wherein said first and second FETs are ring dot FETs.
Claim 15
Independent Claim
174 words
A apparatus for generating a differential output signal in response to a differential input signal with a gain controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to the third circuit node; a first transistor having a collector connected to said first circuit node, and having an emitter and a collector; a second transistor having a collector connected to said second circuit node, and having a base and a collector; wherein said differential input signal is applied across the bases of said first and second transistors, and wherein said differential output signal is developed across said first and second circuit nodes.
Claim 16
Independent Claim
174 words
A apparatus for generating a differential output signal in response to a differential input signal with a gain controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to the third circuit node; a first transistor having a collector connected to said first circuit node, and having an emitter and a collector; a second transistor having a collector connected to said second circuit node, and having a base and a collector; wherein said differential input signal is applied across the bases of said first and second transistors, and wherein said differential output signal is developed across said first and second circuit nodes.
Claim 17
Dependent Claim
45 words
The apparatus in accordance with claim 13 further comprising: a fourth circuit node; a first resistor connected between the first and fourth circuit nodes, a second resistor connected between the second and fourth circuit nodes, and a voltage source connected to said fourth circuit node.
Claim 18
Dependent Claim
47 words
The apparatus in accordance with claim 13 further comprising: a third resistor connected between the emitters of said first and second transistors, a first current source connected to the emitter of said first transistor, and a second current source connected to said emitter of said second transistor.
Claim 19
Dependent Claim
16 words
The apparatus in accordance with claim 13 wherein said first and second FETs are substantially similar.
Claim 20
Dependent Claim
16 words
The apparatus accordance with claim 16 wherein said first and second FETs are substantially asymmetric FETs.
Claim 21
Dependent Claim
17 words
The apparatus in accordance with claim 17 wherein said first and second FETs are ring dot FETs.
Claim 22
Dependent Claim
47 words
The apparatus in accordance with claim 14 further comprising: a third resistor connected between the emitters of said first and second transistors, a first current source connected to the emitter of said first transistor, and a second current source connected to said emitter of said second transistor.
Claim 23
Dependent Claim
18 words
The apparatus in accordance with claim 19 wherein said first and second FETs are substantially similar asymmetric FETs.
Claim 24
Dependent Claim
17 words
The apparatus in accordance with claim 20 wherein said first and second FETs are ring dot FETs.
Claim 25
Independent Claim
219 words
An apparatus for generating an output signal in response to a differential input signal with a gain controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to the third circuit node; a first transistor having a collector connected to said first circuit node, and having an emitter and a collector; a second transistor having a collector connected to said second circuit node, and having a base and a collector; a third transistor having a base connected to said first circuit node, an emitter and a collector, a fourth transistor having a base connected to said second circuit node, an emitter and a collector, an amplifier having inputs connected to the emitters of said third and fourth transistors for producing said output signal in response to voltages developed at its inputs, wherein said differential input signal is applied across the bases of said first and second transistors.
Claim 26
Independent Claim
219 words
An apparatus for generating an output signal in response to a differential input signal with a gain controlled by an input control signal, the apparatus comprising: a first circuit node; a second circuit node; a third circuit node receiving the input control signal; a first field effect transistor (FET) having a drain connected to the first circuit node, a source connected to the second circuit node, and a gate connected to the third circuit node; a second FET having a drain connected to the second circuit node, a source connected to the first circuit node, and a gate connected to the third circuit node; a first transistor having a collector connected to said first circuit node, and having an emitter and a collector; a second transistor having a collector connected to said second circuit node, and having a base and a collector; a third transistor having a base connected to said first circuit node, an emitter and a collector, a fourth transistor having a base connected to said second circuit node, an emitter and a collector, an amplifier having inputs connected to the emitters of said third and fourth transistors for producing said output signal in response to voltages developed at its inputs, wherein said differential input signal is applied across the bases of said first and second transistors.
Claim 27
Dependent Claim
45 words
The apparatus in accordance with claim 22 further comprising: a fourth circuit node; a first resistor connected between the first and fourth circuit nodes, a second resistor connected between the second and fourth circuit nodes, and a voltage source connected to said fourth circuit node.
Claim 28
Dependent Claim
47 words
The apparatus in accordance with claim 23 further comprising: a third resistor connected between the emitters of said first and second transistors, a first current source connected to the emitter of said first transistor, and a second current source connected to said emitter of said second transistor.
Claim 29
Dependent Claim
16 words
The apparatus in accordance with claim 23 wherein said first and second FETs are substantially similar.
Claim 30
Dependent Claim
17 words
The apparatus in accordance with claim 25 wherein said first and second FETs are substantially asymmetric FETs.
Claim 31
Dependent Claim
17 words
The apparatus in accordance with claim 26 wherein said first and second FETs are ring dot FETs.
Claim 32
Dependent Claim
47 words
The apparatus in accordance with claim 24 further comprising: a third resistor connected between the emitters of said first and second transistors, a first current source connected to the emitter of said first transistor, and a second current source connected to said emitter of said second transistor.
Claim 33
Dependent Claim
19 words
The apparatus circuit in accordance with claim 28 wherein said first and second FETs are substantially similar asymmetric FETs.
Claim 34
Dependent Claim
17 words
The apparatus in accordance with claim 29 wherein said first and second FETs are ring dot FETs.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-03-11 | 2005-09-10 | 2006-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-03-11 | 2009-09-10 | 2010-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-03-11 | 2013-09-10 | 2014-03-12 | $7700.00 | Window Closed / Lapsed |