US6355502B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor package and method for making the same
Assignee: National Science and Technology Council
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Filing: 2000-04-25
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Granted: 2002-03-12
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Expires: 2020-04-25
Abstract
Abstract A method for making a semiconductor package firstly provides a lead frame having a first surface and a corresponding second surface. The lead frame includes at least a package unit that further includes a die pad, and a plurality of leads disposed on the periphery of the die pad where each of the leads further includes a neck portion. The method then attaches the second surface of the lead frame to a tape, and performs a punching process to cut off the neck portion of the lead so as to form a plurality of conductive blocks disposed independently on the periphery of the die pad. The method further provides a chip having its back surface attach to the first surface of the die pad, and provides electrical connection between the bonding pad and the first surface of the conductive block by using a plurality of bonding wires. Further, the method performs an encapsulating process to encapsulate the chip, the bonding wires, the die pad, and the first surface of the conductive block. The method then performs a singulating process to separate the package unit from the lead frame. Finally the method performs a detaping process to expose the die pad and the second surface of the conductive block.
Inventors
- 👤 Kun-A Kang
- 👤 Hyung J. Park
- 👤 J. H. Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:16
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/019; H10W70/00; H10W70/01; H10W70/04; H10W70/048; H10W70/40; H10W70/421; H10W70/424; H10W74/10; H10W74/111; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07352; H10W72/075; H10W72/30; H10W72/321; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/951; H10W74/131; H10W74/142; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
177 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface, wherein the leadframe includes at least a package unit that includes a plurality of leads, and each of the lead includes a neck portion; attaching the second surface of the leadframe to a tape; performing a punching process to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires, and the first surfaces of the conductive blocks; performing a singulating process to separate the package units from the leadframe; and performing a detaping process to expose the second surface of the conductive blocks.
Claim 2
Independent Claim
177 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface, wherein the leadframe includes at least a package unit that includes a plurality of leads, and each of the lead includes a neck portion; attaching the second surface of the leadframe to a tape; performing a punching process to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires, and the first surfaces of the conductive blocks; performing a singulating process to separate the package units from the leadframe; and performing a detaping process to expose the second surface of the conductive blocks.
Claim 3
Dependent Claim
36 words
The process for making the semiconductor package of claim 1 wherein the lead frame further comprises a die pad, and the chip has its back surface attached to the die pad for fixing to the tape.
Claim 4
Dependent Claim
35 words
The process for making the semiconductor package of claim 1 wherein the area of the first surface of each conductive block is larger than the area of the corresponding second surface of the conductive block.
Claim 5
Dependent Claim
23 words
The process for making the semiconductor package of claim 1 wherein the side surfaces of each conductive block further comprises a recess structure.
Claim 6
Dependent Claim
32 words
The process for making the semiconductor package of claim 1 wherein the neck portion of each lead forms a V-shaped notch on the first surface of the lead during the punching process.
Claim 7
Dependent Claim
28 words
The process for making the semiconductor package of claim 1 wherein the singulating process further comprises separating the molding compound on the outer edge of the conductive blocks.
Claim 8
Dependent Claim
26 words
The process for making the semiconductor package of claim 1 wherein the lead frame is constituted by a plurality of package units disposed in strip type.
Claim 9
Dependent Claim
26 words
The process for making the semiconductor package of claim 1 wherein the lead frame is constituted by a plurality of package units disposed in array type.
Claim 10
Independent Claim
204 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface, wherein the leadframe includes at least a package unit that includes a plurality of leads, and each of the leads includes a neck portion, and the second surface at the location of the neck portion includes a V-shaped notch; attaching the second surface of the leadframe to a tape; performing a punching process on the first surface at the location opposite to the V-shaped notch to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires and the first surfaces of the conductive blocks; performing a singulating process to separate the package unit from the leadframe; and performing a detaping process to expose the second surface of the conductive blocks.
Claim 11
Independent Claim
204 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface, wherein the leadframe includes at least a package unit that includes a plurality of leads, and each of the leads includes a neck portion, and the second surface at the location of the neck portion includes a V-shaped notch; attaching the second surface of the leadframe to a tape; performing a punching process on the first surface at the location opposite to the V-shaped notch to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires and the first surfaces of the conductive blocks; performing a singulating process to separate the package unit from the leadframe; and performing a detaping process to expose the second surface of the conductive blocks.
Claim 12
Dependent Claim
36 words
The process for making the semiconductor package of claim 9 wherein the lead frame further comprises a die pad, and the chip has its back surface attached to the die pad for fixing to the tape.
Claim 13
Dependent Claim
35 words
The process for making the semiconductor package of claim 9 wherein the area of the first surface of each conductive block is larger than the area of the corresponding second surface of the conductive block.
Claim 14
Dependent Claim
23 words
The process for making the semiconductor package of claim 9 wherein the side surfaces of each conductive block further comprises a recess structure.
Claim 15
Dependent Claim
32 words
The process for making the semiconductor package of claim 9 wherein the neck portion of each lead forms a V-shaped notch on the first surface of the lead during the punching process.
Claim 16
Dependent Claim
38 words
The process for making the semiconductor package of claim 9 wherein the notch of each lead appears in V-shape formed by another punching process, and the depth of the notch is smaller than the thickness of the lead.
Claim 17
Dependent Claim
43 words
The process for making the semiconductor package of claim 9 wherein the notch of each lead appears approximately in the shape of a semicircle formed by a half-etching process, and the depth of the notch is smaller than the thickness of the lead.
Claim 18
Dependent Claim
28 words
The process for making the semiconductor package of claim 9 wherein the singulating process further comprises separating the molding compound on the outer edge of the conductive blocks.
Claim 19
Dependent Claim
26 words
The process for making the semiconductor package of claim 9 wherein the lead frame is constituted by a plurality of package units disposed in strip type.
Claim 20
Dependent Claim
26 words
The process for making the semiconductor package of claim 8 wherein the lead frame is constituted by a plurality of package units disposed in array type.
Claim 21
Independent Claim
184 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface wherein the leadframe includes a plurality of leads, each of the leads having a neck portion, and the second surface at the location of the neck portion including a V-shaped notch; attaching the second surface of the leadframe to a tape; performing a punching process on the first surface at the location opposite to the V-shaped notch to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires and the first surfaces of the conductive blocks; and performing a detaping process to expose the second surface of the conductive blocks.
Claim 22
Independent Claim
184 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface wherein the leadframe includes a plurality of leads, each of the leads having a neck portion, and the second surface at the location of the neck portion including a V-shaped notch; attaching the second surface of the leadframe to a tape; performing a punching process on the first surface at the location opposite to the V-shaped notch to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires and the first surfaces of the conductive blocks; and performing a detaping process to expose the second surface of the conductive blocks.
Claim 23
Independent Claim
157 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface, wherein the leadframe includes a plurality of leads, each of the lead having a neck portion; attaching the second surface of the leadframe to a tape; performing a punching process to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires, and the first surfaces of the conductive blocks; and performing a detaping process to expose the second surface of the conductive blocks.
Claim 24
Independent Claim
157 words
A method for making a semiconductor package comprising: providing a leadframe having a first surface and a corresponding second surface, wherein the leadframe includes a plurality of leads, each of the lead having a neck portion; attaching the second surface of the leadframe to a tape; performing a punching process to cut off the leads at the neck portion location so as to form a plurality of conductive blocks; providing a chip having an active surface and a corresponding back surface, wherein the active surface has a plurality of bonding pads, and the chip has its back surface attached to the tape; providing electrical connection between the bonding pads and the first surface of the conductive blocks by using a plurality of bonding wires; performing an encapsulating process to encapsulate the chip, the bonding wires, and the first surfaces of the conductive blocks; and performing a detaping process to expose the second surface of the conductive blocks.
References Cited (Backward Citations)
US5885852A
Cited
US6177719B1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-03-11 | 2005-09-10 | 2006-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-03-11 | 2009-09-10 | 2010-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-03-11 | 2013-09-10 | 2014-03-12 | $7700.00 | Window Closed / Lapsed |