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US6351185B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Increased output swing line drivers for operation at supply voltages that exceed the breakdown voltage of the integrated circuit technology

Assignee: Ikanos Communications Inc
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Filing: 2000-08-11
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Granted: 2002-02-26
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Expires: 2020-08-11
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Abstract

Abstract An improved line driver and method for increasing the available signal transmit power on a transmission line are disclosed. The improved line driver achieves an available transmit power increase without increasing the maximum current in the line driver output stage. The output stage of the line driver may comprise a first amplifier, a second amplifier, and an integrated back-matching resistor network. In order to further increase the available transmit power; a protective semiconductor device may be added to a line driver output stage for each semiconductor device in the first and second amplifiers. A third embodiment of a line driver output stage in accordance with the present invention may comprise a combination of the integrated back-matching resistor network along with the protective semiconductor devices. In its broadest terms, the method for increasing the available signal transmit power on a transmission line of the present invention can be described as: applying a transmit signal to an input stage of an integrated line driver; amplifying the transmit signal such that the output signal swing exceeds the maximum drain-source voltage of the integrated circuit technology used to implement the line driver amplifier(s); and applying the amplified transmit signal via an integrated back-matching resistor network to the transmission line.

Inventors

  • 👤 Daniel Amrany
  • 👤 Frode Larsen
  • 👤 Arnold Muralt

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 14:25
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/0002; H03; H03F; H03F3/00; H03F3/30; H03F3/3001; H03F3/3022; H03F3/3061; H03F2200/00; H03F2200/541

Claims Analysis

Total Claims: 48
Claim 1
Independent Claim 143 words
An output stage for a line driver, comprising: a first amplifier comprising a series combination of a first semiconductor device and a second semiconductor device; a second amplifier comprising a series combination of a third semiconductor device and a fourth semiconductor device; a first integrated back-matching resistor network interposed between the first and the second semiconductor devices, wherein the first integrated back-matching resistor network comprises a series combination of integrated resistors having an additive resistance selected to match an expected load input impedance; and a second integrated back-matching resistor network interposed between the third and the fourth semiconductor devices, wherein the second integrated back-matching resistor network comprises a series combination of integrated resistors having an additive resistance selected to emulate an expected line input impedance, wherein the second integrated back-matching resistor network is configured in parallel with the first integrated back-matching resistor network.
Claim 2
Dependent Claim 143 words
An output stage for a line driver, comprising: a first amplifier comprising a series combination of a first semiconductor device and a second semiconductor device; a second amplifier comprising a series combination of a third semiconductor device and a fourth semiconductor device; a first integrated back-matching resistor network interposed between the first and the second semiconductor devices, wherein the first integrated back-matching resistor network comprises a series combination of integrated resistors having an additive resistance selected to match an expected load input impedance; and a second integrated back-matching resistor network interposed between the third and the fourth semiconductor devices, wherein the second integrated back-matching resistor network comprises a series combination of integrated resistors having an additive resistance selected to emulate an expected line input impedance, wherein the second integrated back-matching resistor network is configured in parallel with the first integrated back-matching resistor network.
Claim 3
Dependent Claim 66 words
The line driver of claim 1 , wherein a supply voltage applied to a source node of the first and second semiconductor devices of the first and second amplifiers respectively, is increased to a voltage level exceeding the maximum drain-source voltage for the semiconductor device technology associated with the first and second semiconductor devices, resulting in an available maximum power increase at the line driver output.
Claim 4
Dependent Claim 31 words
The line driver of claim 2 , wherein the available maximum power increase at the line driver output is realizable without increasing the maximum current in the line driver output stage.
Claim 5
Dependent Claim 20 words
The line driver of claim 2 , wherein the first, second, third, and fourth semiconductor devices are standard CMOS devices.
Claim 6
Dependent Claim 17 words
The line driver of claim 4 , wherein the first and third semiconductor devices are PMOS transistors.
Claim 7
Dependent Claim 17 words
The line driver of claim 4 , wherein the second and fourth semiconductor devices are NMOS transistors.
Claim 8
Dependent Claim 21 words
The line driver of claim 4 , wherein the standard CMOS devices have a maximum drain-source voltage of approximately 5 Volts.
Claim 9
Dependent Claim 17 words
The line driver of claim 7 , wherein the power supply maximum voltage is approximately 20/3 Volts.
Claim 10
Dependent Claim 19 words
The line driver of claim 8 , wherein the effective signal swing across a load is approximately 10/3 Volts.
Claim 11
Dependent Claim 37 words
The line driver of claim 8 , wherein the effective power gain available at the output of the line driver is greater than approximately 2.5 dB larger than the effective power gain of a conventional line driver.
Claim 12
Dependent Claim 35 words
The line driver of claim 10 , wherein the effective power gain available at the output of the line driver is approximately 3.0 dB larger than the effective power gain of a conventional line driver.
Claim 13
Dependent Claim 169 words
An output stage for a line driver, comprising: a first amplifier comprising a series combination of a first semiconductor device and a second semiconductor device; a second amplifier comprising a series combination of a third semiconductor device and a fourth semiconductor device; a first integrated back-matching resistor interposed between the first and the second semiconductor devices and a first line driver output node; a second integrated back-matching resistor interposed between the third and the fourth semiconductor devices and a second line driver output node; a first supply voltage protective semiconductor device interposed in series between the first semiconductor device and the first integrated back-matching resistor; a second supply voltage protective semiconductor device interposed in series between the first integrated back-matching resistor and the second semiconductor device; a third supply voltage protective semiconductor device interposed in series between the third semiconductor device and the second integrated back-matching resistor; and a fourth supply voltage protective semiconductor device interposed in series between the second integrated back-matching resistor and the fourth semiconductor device.
Claim 14
Dependent Claim 169 words
An output stage for a line driver, comprising: a first amplifier comprising a series combination of a first semiconductor device and a second semiconductor device; a second amplifier comprising a series combination of a third semiconductor device and a fourth semiconductor device; a first integrated back-matching resistor interposed between the first and the second semiconductor devices and a first line driver output node; a second integrated back-matching resistor interposed between the third and the fourth semiconductor devices and a second line driver output node; a first supply voltage protective semiconductor device interposed in series between the first semiconductor device and the first integrated back-matching resistor; a second supply voltage protective semiconductor device interposed in series between the first integrated back-matching resistor and the second semiconductor device; a third supply voltage protective semiconductor device interposed in series between the third semiconductor device and the second integrated back-matching resistor; and a fourth supply voltage protective semiconductor device interposed in series between the second integrated back-matching resistor and the fourth semiconductor device.
Claim 15
Dependent Claim 32 words
The line driver of claim 12 , wherein the sum of the resistance values of the first and the second integrated back-matching resistors is selected to match an expected load input impedance.
Claim 16
Dependent Claim 23 words
The line driver of claim 12 , wherein the first and second supply voltage protective semiconductor devices comprise at least one source follower.
Claim 17
Dependent Claim 26 words
The line driver of claim 12 , wherein the first and second supply voltage protective semiconductor devices protect only a respective semiconductor device that is idle.
Claim 18
Dependent Claim 23 words
The line driver of claim 13 , wherein the first and second integrated back-matching resistors have a resistance of approximately the same value.
Claim 19
Dependent Claim 49 words
The line driver of claim 16 , wherein a supply voltage is increased to a voltage level exceeding the maximum drain-source voltage for the semiconductor device technology associated with the first, second, third, and fourth semiconductor devices, resulting in an available maximum power increase at the line driver output.
Claim 20
Dependent Claim 31 words
The line driver of claim 17 , wherein the available maximum power increase at the line driver output is realizable without increasing the maximum current in the line driver output stage.
Claim 21
Dependent Claim 34 words
The line driver of claim 18 , wherein the power supply maximum voltage is approximately twice the maximum drain-source voltage of the semiconductor device technology of the first, second, third, and fourth semiconductor devices.
Claim 22
Dependent Claim 20 words
The line driver of claim 12 , wherein the first, second, third, and fourth semiconductor devices are standard CMOS devices.
Claim 23
Dependent Claim 21 words
The line driver of claim 20 , wherein the standard CMOS devices have a maximum drain-source voltage of approximately 5 Volts.
Claim 24
Dependent Claim 17 words
The line driver of claim 21 , wherein the power supply maximum voltage is approximately 10 Volts.
Claim 25
Dependent Claim 17 words
The line driver of claim 22 , wherein the first and third semiconductor devices are PMOS transistors.
Claim 26
Dependent Claim 17 words
The line driver of claim 22 , wherein the second and fourth semiconductor devices are NMOS transistors.
Claim 27
Dependent Claim 20 words
The line driver of claim 22 , wherein the first and third supply voltage protective semiconductor devices are PMOS transistors.
Claim 28
Dependent Claim 20 words
The line driver of claim 22 , wherein the second and fourth supply voltage protective semiconductor devices are NMOS transistors.
Claim 29
Dependent Claim 25 words
The line driver of claim 22 , wherein the effective signal swing across a load is approximately equivalent to the full power supply voltage range.
Claim 30
Dependent Claim 35 words
The line driver of claim 22 , wherein the effective power gain available at the output of the line driver is approximately 6.0 dB larger than the effective power gain of a conventional line driver.
Claim 31
Dependent Claim 183 words
An output stage for a line driver, comprising: a first amplifier comprising a series combination of a first semiconductor device, a first semiconductor protective device, a second semiconductor device, and a second semiconductor protective device, wherein the first and second semiconductor protective devices are interposed between the first semiconductor device and the second semiconductor devices; a second amplifier comprising a series combination of a third semiconductor device, a third semiconductor protective device, a fourth semiconductor device, and a fourth semiconductor protective device, wherein the third and fourth semiconductor protective devices are interposed between the third semiconductor device and the fourth semiconductor devices; a first integrated back-matching resistor network interposed between the first semiconductor protective device and a first pole of a transformer; a second integrated back-matching resistor network interposed between the first pole of the transformer and the second semiconductor protective device; a third integrated back-matching resistor network interposed between the third semiconductor protective device and a second pole of the transformer; and a fourth integrated back-matching resistor network interposed between the second pole of the transformer and the fourth semiconductor protective device.
Claim 32
Dependent Claim 183 words
An output stage for a line driver, comprising: a first amplifier comprising a series combination of a first semiconductor device, a first semiconductor protective device, a second semiconductor device, and a second semiconductor protective device, wherein the first and second semiconductor protective devices are interposed between the first semiconductor device and the second semiconductor devices; a second amplifier comprising a series combination of a third semiconductor device, a third semiconductor protective device, a fourth semiconductor device, and a fourth semiconductor protective device, wherein the third and fourth semiconductor protective devices are interposed between the third semiconductor device and the fourth semiconductor devices; a first integrated back-matching resistor network interposed between the first semiconductor protective device and a first pole of a transformer; a second integrated back-matching resistor network interposed between the first pole of the transformer and the second semiconductor protective device; a third integrated back-matching resistor network interposed between the third semiconductor protective device and a second pole of the transformer; and a fourth integrated back-matching resistor network interposed between the second pole of the transformer and the fourth semiconductor protective device.
Claim 33
Dependent Claim 35 words
The line driver of claim 29 , wherein the first, second, third, and fourth integrated back-matching resistor networks comprise a combination of integrated resistors having a resistance selected to match an expected load input impedance.
Claim 34
Dependent Claim 62 words
The line driver of claim 29 , further comprising: a first integrated resistor having a resistance selected to emulate an expected line input impedance interposed between the first and the second integrated back-matching resistor networks; and a second integrated resistor having a resistance selected to emulate an expected line input impedance interposed between the third and the fourth integrated back-matching resistor networks.
Claim 35
Dependent Claim 61 words
The line driver of claim 29 , wherein a supply voltage applied to a source node of the first and third semiconductor devices is increased to a voltage level exceeding the maximum drain-source voltage for the semiconductor device technology associated with the first, second, third, and fourth semiconductor devices, resulting in an available maximum power increase at the line driver output.
Claim 36
Dependent Claim 31 words
The line driver of claim 32 , wherein the available maximum power increase at the line driver output is realizable without increasing the maximum current in the line driver output stage.
Claim 37
Dependent Claim 20 words
The line driver of claim 33 , wherein the first, second, third, and fourth semiconductor devices are standard CMOS devices.
Claim 38
Dependent Claim 21 words
The line driver of claim 34 , wherein the standard CMOS devices have a maximum drain-source voltage of approximately 5 Volts.
Claim 39
Dependent Claim 17 words
The line driver of claim 34 , wherein the power supply maximum voltage is approximately 40/3 Volts.
Claim 40
Dependent Claim 17 words
The line driver of claim 34 , wherein the first and third semiconductor devices are PMOS transistors.
Claim 41
Dependent Claim 17 words
The line driver of claim 34 , wherein the second and fourth semiconductor devices are NMOS transistors.
Claim 42
Dependent Claim 20 words
The line driver of claim 34 , wherein the first and third supply voltage protective semiconductor devices are PMOS transistors.
Claim 43
Dependent Claim 20 words
The line driver of claim 34 , wherein the second and fourth supply voltage protective semiconductor devices are NMOS transistors.
Claim 44
Dependent Claim 19 words
The line driver of claim 36 , wherein the effective signal swing across a load is approximately 20/3 Volts.
Claim 45
Dependent Claim 37 words
The line driver of claim 36 , wherein the effective power gain available at the output of the line driver is greater than approximately 8.5 dB larger than the effective power gain of a conventional line driver.
Claim 46
Dependent Claim 35 words
The line driver of claim 36 , wherein the effective power gain available at the output of the line driver is approximately 9.0 dB larger than the effective power gain of a conventional line driver.
Claim 47
Dependent Claim 77 words
An integrated circuit line driver, comprising: means for increasing the effective output signal swing to at least a voltage level that exceeds the maximum drain-source voltage of the integrated circuit technology, wherein the means for increasing the effective output signal swing comprises: a plurality of protective semiconductor devices, wherein the protective semiconductor devices comprise at least one source follower and wherein the protective semiconductor devices protect a semiconductor device that is idle; and an integrated resistor network.
Claim 48
Dependent Claim 77 words
An integrated circuit line driver, comprising: means for increasing the effective output signal swing to at least a voltage level that exceeds the maximum drain-source voltage of the integrated circuit technology, wherein the means for increasing the effective output signal swing comprises: a plurality of protective semiconductor devices, wherein the protective semiconductor devices comprise at least one source follower and wherein the protective semiconductor devices protect a semiconductor device that is idle; and an integrated resistor network.

References Cited (Backward Citations)

US3495223A Cited
US3530391A Cited
US5847600A Cited
US6087899A Cited
US6025742A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-02-25 2005-08-27 2006-02-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-02-25 2009-08-27 2010-02-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-02-25 2013-08-27 2014-02-26 $7700.00 Window Closed / Lapsed

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