Receiving data on a networked computer in a reduced power state

Claim 2

A controller suitable for monitoring events related to a computer system, comprising: a control processor configured to communicate with a host processor; a plurality of connections operationally coupled with the control processor, wherein the control processor is configured to monitor system events over the plurality of connections; and a network interface operationally coupled with the control processor and having a memory, wherein the memory provides frame data to the control processor, and wherein the control processor is configured to monitor network events from the frame data.

Claim 3

The controller of claim 1 , wherein the memory comprises a dual port memory.

Claim 4

The controller of claim 1 , wherein the control processor comprises a processor having an Industry Standard Architecture bus connection.

Claim 5

The controller of claim 1 , wherein the plurality of connections comprise: a fan speed connection; a plurality of voltage connections; and a plurality of temperature connections.

Claim 6

The controller of claim 1 , wherein the memory is partitioned into a plurality of segments and each of the segments are sized to hold a single frame.

Claim 7

A controller suitable for monitoring events related to a computer system, comprising: a control processor configured to communicate with a host processor; a plurality of connections operationally coupled with the control processor, wherein the control processor is configured to monitor system events over the plurality of connections; and a network interface operationally coupled with the control processor and having a memory, wherein the memory provides frame data to the control processor, wherein the control processor is configured to monitor network events from the frame data, wherein the memory is partitioned into a plurality of segments and each of the segments are sized to hold a single frame, wherein said computer system includes a host media access control, and wherein the network interface further comprises: a media access control providing connections to a media interface, wherein said media access control is other than said host media access control; and a buffer manager operationally coupled with the media access control and the memory, wherein the buffer manager receives frame data from the media access control and writes the frame data to the memory.

Claim 8

A controller suitable for monitoring events related to a computer system, comprising: a control processor configured to communicate with a host processor; a plurality of connections operationally coupled with the control processor, wherein the control processor is configured to monitor system events over the plurality of connections; and a network interface operationally coupled with the control processor and having a memory, wherein the memory provides frame data to the control processor, wherein the control processor is configured to monitor network events from the frame data, wherein the memory is partitioned into a plurality of segments and each of the segments are sized to hold a single frame, wherein said computer system includes a host media access control, and wherein the network interface further comprises: a media access control providing connections to a media interface, wherein said media access control is other than said host media access control; and a buffer manager operationally coupled with the media access control and the memory, wherein the buffer manager receives frame data from the media access control and writes the frame data to the memory.

Claim 9

The controller of claim 6 , wherein the buffer manager is configured to write frame data relating to a single frame in only one of the plurality of segments.

Claim 10

The controller of claim 7 , wherein the buffer manager is configured to generate an overflow signal if the frame data does not fit within a segment.

Claim 11

The controller of claim 7 , wherein the buffer manager is configured to generate an overflow signal if each of the plurality of segments contain unread frame data.

Claim 12

The controller of claim 7 , wherein the memory comprises a circular memory.

Claim 13

The controller of claim 10 , wherein the memory is configured to provide frame data from one segment of the plurality of segments to the control processor and simultaneously to write frame data to another segment.

Claim 14

The controller of claim 6 , wherein the network interface comprises an ethernet interface.

Claim 15

The controller of claim 1 , further comprising an isolation connection, wherein the controller provides a signal over the isolation connection to isolate a host media access control from a host physical layer.

Claim 16

The controller of claim 1 , wherein the memory comprises a random access memory.