US6281762B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
SPST switch, SPDT switch, and communication apparatus using the SPDT switch
Assignee: Murata Manufacturing Co Ltd
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Filing: 1999-08-06
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Granted: 2001-08-28
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Expires: 2019-08-06
Abstract
Abstract An SPST switch having a small transmission loss and a small power consumption is provided. The drain and the source of an FET are connected to each other in series through an induction element and a capacitor element, one terminal of the capacitor element is connected to a first terminal, the other terminal is connected to a second terminal, the gate of the FET is connected to a control terminal, the capacitance of the capacitor element is made equal to the OFF capacitance of the FET, and the inductance of the induction element is set to be such a value that the induction element resonates at a signal frequency with the capacitor element.
Inventors
- 👤 Motoyasu Nakao
- 👤 Akihiro Sasabata
- 👤 Hiroaki Tanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 06:01
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/693
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
125 words
A single pole single throw (SPST) switch, comprising: a first, a second, and a control terminal; a field effect transistor (FET) having a gate connected to the control terminal, a drain connected to the first terminal, and a source, the FET exhibiting an OFF capacitance from drain to source; a capacitor element having a capacitance substantially equal to the OFF capacitance of the FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal; and an induction element having one end connected to the source of the FET and another end connected to the second terminal, an inductance of the induction element being set such that it resonates with the capacitor element at a signal frequency.
Claim 2
Dependent Claim
125 words
A single pole single throw (SPST) switch, comprising: a first, a second, and a control terminal; a field effect transistor (FET) having a gate connected to the control terminal, a drain connected to the first terminal, and a source, the FET exhibiting an OFF capacitance from drain to source; a capacitor element having a capacitance substantially equal to the OFF capacitance of the FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal; and an induction element having one end connected to the source of the FET and another end connected to the second terminal, an inductance of the induction element being set such that it resonates with the capacitor element at a signal frequency.
Claim 3
Dependent Claim
258 words
A single pole double throw (SPDT) switch, comprising: a first, a second, and a third terminal; a first and a second control terminal; a first field effect transistor (FET) having a gate connected to the first control terminal, a drain connected to the first terminal, and a source, the first FET exhibiting an OFF capacitance from drain to source; a first capacitor element having a capacitance substantially equal to the OFF capacitance of the first FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal; a first induction element having one end connected to the source of the first FET and another end connected to the second terminal, an inductance of the first induction element being set such that it resonates with the first capacitor element at a signal frequency a second field effect transistor (FET) having a gate connected to the second control terminal, a drain connected to the first terminal, and a source, the second FET exhibiting an OFF capacitance from drain to source; a second capacitor element having a capacitance substantially equal to the OFF capacitance of the second FET, the capacitor element having one end connected to the first terminal and another end connected to the third terminal; and a second induction element having one end connected to the source of the second FET and another end connected to the third terminal, an inductance of the second induction element being set such that it resonates with the second capacitor element at a signal frequency.
Claim 4
Dependent Claim
258 words
A single pole double throw (SPDT) switch, comprising: a first, a second, and a third terminal; a first and a second control terminal; a first field effect transistor (FET) having a gate connected to the first control terminal, a drain connected to the first terminal, and a source, the first FET exhibiting an OFF capacitance from drain to source; a first capacitor element having a capacitance substantially equal to the OFF capacitance of the first FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal; a first induction element having one end connected to the source of the first FET and another end connected to the second terminal, an inductance of the first induction element being set such that it resonates with the first capacitor element at a signal frequency a second field effect transistor (FET) having a gate connected to the second control terminal, a drain connected to the first terminal, and a source, the second FET exhibiting an OFF capacitance from drain to source; a second capacitor element having a capacitance substantially equal to the OFF capacitance of the second FET, the capacitor element having one end connected to the first terminal and another end connected to the third terminal; and a second induction element having one end connected to the source of the second FET and another end connected to the third terminal, an inductance of the second induction element being set such that it resonates with the second capacitor element at a signal frequency.
Claim 5
Dependent Claim
327 words
A communication apparatus, comprising: a single pole double throw (SPDT) switch, including: a first, a second, and a third terminal; a first and a second control terminal; a first field effect transistor (FET) having a gate connected to the first control terminal, a drain connected to the first terminal, and a source, the first FET exhibiting an OFF capacitance from drain to source; a first capacitor element having a capacitance substantially equal to the OFF capacitance of the first FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal; a first induction element having one end connected to the source of the first FET and another end connected to the second terminal, an inductance of the first induction element being set such that it resonates with the first capacitor element at a signal frequency a second field effect transistor (FET) having a gate connected to the second control terminal, a drain connected to the first terminal, and a source, the second FET exhibiting an OFF capacitance from drain to source; a second capacitor element having a capacitance substantially equal to the OFF capacitance of the second FET, the capacitor element having one end connected to the first terminal and another end connected to the third terminal; and a second induction element having one end connected to the source of the second FET and another end connected to the third terminal, an inductance of the second induction element being set such that it resonates with the second capacitor element at a signal frequency; an antenna coupled to the first terminal; a receiving circuit coupled to the second terminal; a transmitting circuit coupled to the third terminal; and a control circuit coupled to the first and second control terminals and being operable to provide switching signals to the first and second FETs such that the transmitting and receiving circuits are alternatively coupled to the antenna through the SPDT switch.
Claim 6
Dependent Claim
327 words
A communication apparatus, comprising: a single pole double throw (SPDT) switch, including: a first, a second, and a third terminal; a first and a second control terminal; a first field effect transistor (FET) having a gate connected to the first control terminal, a drain connected to the first terminal, and a source, the first FET exhibiting an OFF capacitance from drain to source; a first capacitor element having a capacitance substantially equal to the OFF capacitance of the first FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal; a first induction element having one end connected to the source of the first FET and another end connected to the second terminal, an inductance of the first induction element being set such that it resonates with the first capacitor element at a signal frequency a second field effect transistor (FET) having a gate connected to the second control terminal, a drain connected to the first terminal, and a source, the second FET exhibiting an OFF capacitance from drain to source; a second capacitor element having a capacitance substantially equal to the OFF capacitance of the second FET, the capacitor element having one end connected to the first terminal and another end connected to the third terminal; and a second induction element having one end connected to the source of the second FET and another end connected to the third terminal, an inductance of the second induction element being set such that it resonates with the second capacitor element at a signal frequency; an antenna coupled to the first terminal; a receiving circuit coupled to the second terminal; a transmitting circuit coupled to the third terminal; and a control circuit coupled to the first and second control terminals and being operable to provide switching signals to the first and second FETs such that the transmitting and receiving circuits are alternatively coupled to the antenna through the SPDT switch.
References Cited (Backward Citations)
JPH01202007A
Cited
US6118985A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-08-27 | 2005-02-26 | 2005-08-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-08-27 | 2009-02-26 | 2009-08-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-08-27 | 2013-02-26 | 2013-08-28 | $7700.00 | Window Closed / Lapsed |