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US6281747B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Power efficient line driver

Assignee: Cirrus Logic Inc
•
Filing: 2001-01-24
•
Granted: 2001-08-28
•
Expires: 2021-01-24
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Abstract

Abstract A signal processing circuit is described including a frequency selective network in a feedback loop. An analog-to-analog converter in the feedback loop is coupled to the frequency selective network. A continuous-time feedback path provides feedback from the output terminal of the analog-to-analog converter to the frequency selective network.

Inventors

  • 👤 Bhupendra K. Ahuja
  • 👤 Cary L. Delano
  • 👤 Adya S. Tripathi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 07:11
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0244; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/12; H03H11/1217; H03F2200/00; H03F2200/331

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 98 words
A signal processing circuit, comprising: an n th order distortion filter in a feedback loop, n being greater than one; an amplifier in the feedback loop coupled to the distortion filter, the amplifier employing one of a plurality of power supply voltages for each of a plurality of output signal ranges, the amplifier introducing nonlinearities into the feedback loop related at least in part to switching between the power supply voltages; and at least one linear, continuous-time feedback path from the amplifier to the distortion filter, the at least one continuous-time feedback path facilitating correction of the nonlinearities.
Claim 2
Dependent Claim 98 words
A signal processing circuit, comprising: an n th order distortion filter in a feedback loop, n being greater than one; an amplifier in the feedback loop coupled to the distortion filter, the amplifier employing one of a plurality of power supply voltages for each of a plurality of output signal ranges, the amplifier introducing nonlinearities into the feedback loop related at least in part to switching between the power supply voltages; and at least one linear, continuous-time feedback path from the amplifier to the distortion filter, the at least one continuous-time feedback path facilitating correction of the nonlinearities.
Claim 3
Dependent Claim 17 words
The signal processing circuit of claim 1 wherein the distortion filter comprises a plurality of integrator stages.
Claim 4
Dependent Claim 15 words
The signal processing circuit of claim 2 wherein the distortion filter comprises 2 integrator stages.
Claim 5
Dependent Claim 15 words
The signal processing circuit of claim 2 wherein the distortion filter comprises 3 integrator stages.
Claim 6
Dependent Claim 15 words
The signal processing circuit of claim 2 wherein the distortion filter comprises a Butterworth filter.
Claim 7
Dependent Claim 17 words
The signal processing circuit of claim 1 wherein the distortion filter comprises a plurality of resonator stages.
Claim 8
Dependent Claim 15 words
The signal processing circuit of claim 1 wherein the amplifier comprises a class G amplifier.
Claim 9
Dependent Claim 36 words
The signal processing circuit of claim 1 wherein the at least one continuous-time feedback path comprises a plurality of feedback elements which determine a coefficient for each of a plurality of stages of the distortion filter.
Claim 10
Dependent Claim 18 words
The signal processing circuit of claim 1 wherein the at least one continuous-time feedback path comprises scaling elements.
Claim 11
Dependent Claim 40 words
The signal processing circuit of claim 1 wherein the amplifier comprises an input terminal and an output terminal, and wherein the at least one continuous-time feedback path includes a first feedback path from the output terminal to the input terminal.
Claim 12
Dependent Claim 17 words
A line driver for a digital subscriber line comprising the signal processing circuit of claim 1 .
Claim 13
Dependent Claim 15 words
The line driver of claim 11 wherein the digital subscriber line comprises an ADSL line.
Claim 14
Dependent Claim 23 words
A method for driving a digital subscriber line comprising driving the digital subscriber line using the signal processing circuit of claim 1 .
Claim 15
Dependent Claim 12 words
An audio amplifier comprising the signal processing circuit of claim 1 .
Claim 16
Independent Claim 120 words
A method for processing a first signal using an amplifier which employs one of a plurality of power supply voltages for each of a plurality of output signal ranges, the amplifier introducing nonlinearities into the feedback loop related at least in part to switching between the power supply voltages, the method comprising: receiving the first signal with an n th order distortion filter where n is greater than one, and generating a filtered signal in response thereto; receiving the filtered signal from the frequency selective network with amplifier and generating a second signal in response thereto; and feeding the second signal back to the distortion filter via at least one linear, continuous-time feedback path, thereby facilitating correction of the nonlinearities.
Claim 17
Independent Claim 120 words
A method for processing a first signal using an amplifier which employs one of a plurality of power supply voltages for each of a plurality of output signal ranges, the amplifier introducing nonlinearities into the feedback loop related at least in part to switching between the power supply voltages, the method comprising: receiving the first signal with an n th order distortion filter where n is greater than one, and generating a filtered signal in response thereto; receiving the filtered signal from the frequency selective network with amplifier and generating a second signal in response thereto; and feeding the second signal back to the distortion filter via at least one linear, continuous-time feedback path, thereby facilitating correction of the nonlinearities.
Claim 18
Dependent Claim 13 words
The method of claim 15 wherein the first signal comprises an ADSL signal.

References Cited (Backward Citations)

US3806828A Cited
US4458208A Cited
US5237288A Cited
US5440270A Cited
US5510753A Cited
US5606289A Cited
US6002229A Cited
US5712593A Cited
US5805020A Cited
US6084468A Cited
US5969575A Cited
US6081161A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-08-27 2005-02-26 2005-08-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-08-27 2009-02-26 2009-08-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-08-27 2013-02-26 2013-08-28 $7700.00 Window Closed / Lapsed

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