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US6256223B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Current-induced magnetic switching device and memory including the same

Assignee: International Business Machines Corp
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Filing: 2000-06-20
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Granted: 2001-07-03
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Expires: 2020-06-20
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Abstract

Abstract A magnetic switching device, includes a first electrode, a second electrode, and a nanoparticle having a magnetic moment and being disposed between the first and second electrodes. At least one of the first electrode and the second electrode includes a magnetic material which has a net spin polarization in its conduction band for injecting, into the nanoparticle, an electrical current including a net spin polarization for overcoming the magnetic moment of the nanoparticle upon selection of a predetermined magnitude for the electrical current.

Inventors

  • 👤 Jonathan Zanhong Sun

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 17:40
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/02; G11C11/16; B; B82; B82Y; B82Y25/00; H; H01; H01F; H01F10/00; H01F10/32; H01F10/3213; H01F10/3227; H01F10/324; H01F10/3254; H10; H10N; H10N50/00; H10N50/10

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 137 words
A memory array, comprising: a plurality of first metal lines; a plurality of second metal lines approximately perpendicular to said plurality of first metal lines; a plurality of two-terminal devices respectively provided at intersections of said first and second metal lines, each of said two-terminal devices including: a pair of back-to-back diodes placed in series with a magnectic junction to allow selective read-addressing; and a supply cell with a bias current exceeding a positive or negative current threshold (+I c or −I c ) of said switch, said supply cell forming a same addressing circuit for selective write and read operations, wherein, with a predetermined I c and V c the I c of only one junction situated at an intersection of the first and second metal line is selectively exceeded while king all other junctions unchanged.
Claim 2
Dependent Claim 137 words
A memory array, comprising: a plurality of first metal lines; a plurality of second metal lines approximately perpendicular to said plurality of first metal lines; a plurality of two-terminal devices respectively provided at intersections of said first and second metal lines, each of said two-terminal devices including: a pair of back-to-back diodes placed in series with a magnectic junction to allow selective read-addressing; and a supply cell with a bias current exceeding a positive or negative current threshold (+I c or −I c ) of said switch, said supply cell forming a same addressing circuit for selective write and read operations, wherein, with a predetermined I c and V c the I c of only one junction situated at an intersection of the first and second metal line is selectively exceeded while king all other junctions unchanged.
Claim 3
Dependent Claim 79 words
A magnetic memory, comprising: a current-driven magnetic switching device forming a basic storage element for said memory; and an x-y grid, said switching device being formed at an intersection of said x-y grid, wherein said x-y grid is used for both reading and writing to said basic storage element such that said switching device is momentarily biased by a current level above its switching threshold, causing said switching device to change its magnetic state, thereby writing to said memory.
Claim 4
Dependent Claim 79 words
A magnetic memory, comprising: a current-driven magnetic switching device forming a basic storage element for said memory; and an x-y grid, said switching device being formed at an intersection of said x-y grid, wherein said x-y grid is used for both reading and writing to said basic storage element such that said switching device is momentarily biased by a current level above its switching threshold, causing said switching device to change its magnetic state, thereby writing to said memory.
Claim 5
Dependent Claim 32 words
A magnetic nanocluster junction, comprising: a ferromagnetic electrode; a ferromagnetic nanoparticle having a first side adjacent said ferromagnetic electrode; and a counter electrode adjacent said ferromagnetic nanoparticle on a second side thereof.
Claim 6
Dependent Claim 32 words
A magnetic nanocluster junction, comprising: a ferromagnetic electrode; a ferromagnetic nanoparticle having a first side adjacent said ferromagnetic electrode; and a counter electrode adjacent said ferromagnetic nanoparticle on a second side thereof.
Claim 7
Dependent Claim 54 words
The magnetic nanocluster junction according to claim 3 , wherein said ferromagnetic electrode, said ferromagnetic nanoparticle and said counter electrode form a magnetic junction structure of one of La 0.67 MnO 3 /SrTiO 3 /La 0.67 Sr 0.33 MnO 3 and La 0.67 MnO 3 /SrTiO 3 /La 0.67 Ca 0.33 MnO 3 .
Claim 8
Dependent Claim 81 words
A magnetic random-access memory architecture, comprising: a phlrality of magnetic nanocluster junctions, each of said magnetic nanocluster junctions comprising: a ferromagnetic electrode; a ferromagnetic nanoparticle having a first side adjacent said ferromagnetic electrode; and a counter electrode adjacent said ferromagnetic nanoparticle on a second side thereof, said nanocluster junction forming a current-driven switch for a memory cell; and an addressing circuit for addressing a selected memory cell, wherein a read operation and a write operation are achieved using the addressing circuit.
Claim 9
Dependent Claim 81 words
A magnetic random-access memory architecture, comprising: a phlrality of magnetic nanocluster junctions, each of said magnetic nanocluster junctions comprising: a ferromagnetic electrode; a ferromagnetic nanoparticle having a first side adjacent said ferromagnetic electrode; and a counter electrode adjacent said ferromagnetic nanoparticle on a second side thereof, said nanocluster junction forming a current-driven switch for a memory cell; and an addressing circuit for addressing a selected memory cell, wherein a read operation and a write operation are achieved using the addressing circuit.
Claim 10
Dependent Claim 14 words
The memory of claim 2 , wherein said x-y grid comprises a bitline-wordline grid.
Claim 11
Dependent Claim 14 words
The memory of claim 2 , wherein said switching device comprises a two-terminal device.
Claim 12
Dependent Claim 28 words
The memory according to claim 7 , wherein said two-terminal device comprises: a pair of back-to-back diodes placed in series with a magnetic junction, to allow selective read-addressing.
Claim 13
Dependent Claim 45 words
The memory according to claim 8 , wherein said two-terminal device further comprises: a supply cell with a bias current exceeding a positive or negative current threshold of said switching device, said supply cell forming a same addressing circuit for selective write and read operations.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-07-02 2005-01-01 2005-07-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-07-02 2009-01-01 2009-07-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-07-02 2013-01-01 2013-07-03 $7700.00 Window Closed / Lapsed

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