US6237095B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for transfer of secure information between a data carrying module and an electronic device
Assignee: Maxim Integrated Products Inc
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Filing: 1998-01-06
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Granted: 2001-05-22
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Expires: 2018-01-06
Abstract
Abstract The present invention relates to an electronic module used for secure transactions. More specifically, the electronic module is capable of passing encrypted information back and forth between a service provider's equipment via a secure, encrypted technique so that money and other valuable data can be securely passed electronically. The module is capable of being programmed, keeping track of real time, recording transactions for later review, and creating encryption key pairs.
Inventors
- 👤 Stephen M. Curry
- 👤 Donald W. Loomis
- 👤 Christopher W. Fox
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 14:16
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/32; H04L9/3247; H04L9/3249; G; G06; G06Q; G06Q20/00; G06Q20/04; G06Q20/06; G06Q20/30; G06Q20/34; G06Q20/341; G06Q20/36; G06Q20/367; G06Q20/3672; G06Q20/38; G06Q20/382; G06Q20/3823; G06Q20/40; G06Q20/409; G06Q20/4093; G06Q20/4097; G06Q20/40975; G07; G07F; G07F7/00; G07F7/08; G07F7/10; G07F7/1008; G07F7/1016; H04L9/3263; H04L2209/00; H04L2209/34; H04L2209/56
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
153 words
An apparatus for receiving and transmitting encrypted data, comprising: an input/output interface for receiving a challenge number from an electronic device; a microprocessor circuit connected to said input/output interface; a coprocessor circuit, connected to said microprocessor circuit; a timing circuit connected to the microprocessor, the timing circuit for generating a time stamp; a first memory connected to said microprocessor circuit, said first memory for storing a first data object; and a second memory connected to said microprocessor circuit, said second memory including instructions readable by said microprocessor circuit to thereby cause said microprocessor circuit to: initiate generation of a certificate, said certificate including said challenge number and a second data object; and adjust said first data object according to said second data object responsive to a verification signal from said electronic device; store a transaction script, the transaction script including at least a representation of the time stamp generated by the timing circuit.
Claim 2
Independent Claim
153 words
An apparatus for receiving and transmitting encrypted data, comprising: an input/output interface for receiving a challenge number from an electronic device; a microprocessor circuit connected to said input/output interface; a coprocessor circuit, connected to said microprocessor circuit; a timing circuit connected to the microprocessor, the timing circuit for generating a time stamp; a first memory connected to said microprocessor circuit, said first memory for storing a first data object; and a second memory connected to said microprocessor circuit, said second memory including instructions readable by said microprocessor circuit to thereby cause said microprocessor circuit to: initiate generation of a certificate, said certificate including said challenge number and a second data object; and adjust said first data object according to said second data object responsive to a verification signal from said electronic device; store a transaction script, the transaction script including at least a representation of the time stamp generated by the timing circuit.
Claim 3
Dependent Claim
11 words
The apparatus of claim 1 , wherein said apparatus is programmable.
Claim 4
Dependent Claim
15 words
The apparatus of claim 2 , wherein said apparatus is programmable via object oriented software.
Claim 5
Dependent Claim
17 words
The apparatus of claim 1 , wherein said apparatus is capable of producing random encryption key pairs.
Claim 6
Dependent Claim
23 words
The apparatus of claim 1 , further comprising memory means for storing a predetermined program, said memory means being connected to said microprocessor.
Claim 7
Dependent Claim
29 words
The apparatus of claim 1 , further comprising a transaction counter for counting a number of transactions that said apparatus performs, said transaction counter being connected to said microprocessor.
Claim 8
Dependent Claim
26 words
The apparatus of claim 1 wherein said first data object includes a base monetary amount and wherein said second data object includes a transaction monetary amount.
Claim 9
Dependent Claim
51 words
The apparatus of claim 6 wherein the second memory further comprises instructions readable by said microprocessor circuit to thereby cause said microprocessor circuit to store a verification for one of said transactions, said verification including a value of said transactions counter for said one of said transactions and an encrypted signature.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-05-21 | 2004-11-20 | 2005-05-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-05-21 | 2008-11-20 | 2009-05-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-05-21 | 2012-11-20 | 2013-05-22 | $7700.00 | Window Closed / Lapsed |