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US6207516B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating gate oxide layer with different thickness

Assignee: United Microelectronics Corp
•
Filing: 1998-12-17
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Granted: 2001-03-27
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Expires: 2018-12-17
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Abstract

Abstract A method of fabricating a gate oxide layer of different thickness. A substrate having a gate oxide layer and a gate is provided and a portion of the gate oxide layer is removed. A first thermal oxide layer is formed to cover the surface of the substrate and the gate and a masking layer is formed to cover the first thermal oxide layer. The masking layer is defined and a portion of the thermal oxide layer is removed to expose a portion of the surface of the gate and the substrate. A first implantation is performed and a drain region is formed at the side of the gate. A second thermal oxide layer is then formed to cover the exposing substrate and the exposing gate. The masking layer is removed and the second thermal oxide layer and the first thermal oxide layer are etched back to expose the surface of the gate and the second thermal oxide layer becomes a spacer structure. A second implantation is performed and a source region is then formed at the other side of the gate; the dopant concentration in the drain region adjacent to the gate is lighter.

Inventors

  • 👤 Tien-Hao Tang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 10:23
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0221; H10D30/60; H10D30/601; H10D30/603; H10P; H10P14/00; H10P14/60; H10P14/61

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 212 words
A method of fabricating a gate oxide layer with different thickness, wherein a gate oxide layer and a gate are provided on a substrate, comprising: removing a portion of the gate oxide layer; forming a first thermal oxide layer to cover the surface of the substrate and the gate; forming a masking layer to cover the first thermal oxide layer; defining the masking layer and removing a portion of the first thermal oxide layer to expose a portion of the surface of the gate and the substrate; forming a drain region at one side of the gate on the substrate by performing a first implantation; forming a second thermal oxide layer to cover the exposed substrate and the gate; removing the masking layer and etching back the second thermal oxide layer and the first thermal oxide layer, the surface of the gate is exposed, the first thermal oxide layer becomes a first spacer structure adjacent to a subsequently formed source region and the second thermal oxide layer becomes a spacer structure adjacent to the drain region; and forming a source region at the other side of the gate by performing a second implantation, wherein a doped concentration of the drain region adjacent to the gate and beneath the second spacer is lighter.
Claim 2
Independent Claim 212 words
A method of fabricating a gate oxide layer with different thickness, wherein a gate oxide layer and a gate are provided on a substrate, comprising: removing a portion of the gate oxide layer; forming a first thermal oxide layer to cover the surface of the substrate and the gate; forming a masking layer to cover the first thermal oxide layer; defining the masking layer and removing a portion of the first thermal oxide layer to expose a portion of the surface of the gate and the substrate; forming a drain region at one side of the gate on the substrate by performing a first implantation; forming a second thermal oxide layer to cover the exposed substrate and the gate; removing the masking layer and etching back the second thermal oxide layer and the first thermal oxide layer, the surface of the gate is exposed, the first thermal oxide layer becomes a first spacer structure adjacent to a subsequently formed source region and the second thermal oxide layer becomes a spacer structure adjacent to the drain region; and forming a source region at the other side of the gate by performing a second implantation, wherein a doped concentration of the drain region adjacent to the gate and beneath the second spacer is lighter.
Claim 3
Dependent Claim 22 words
The method according to claim 1 , wherein removing a portion of the gate oxide layer is performed by isotropic etching method.
Claim 4
Dependent Claim 21 words
The method according to claim 1 , wherein removing a portion of the gate oxide layer is performed by HF solution.
Claim 5
Dependent Claim 23 words
The method according to claim 1 , wherein the thickness of the thermal oxide layer is in a range of about 100-200 Å.
Claim 6
Dependent Claim 16 words
The method according to claim 1 , wherein the masking layer includes a silicon nitride layer.
Claim 7
Dependent Claim 16 words
The method according to claim 5 , wherein the silicon nitride layer is formed by deposition.
Claim 8
Dependent Claim 23 words
The method according to claim 5 , wherein the thickness of the silicon nitride layer is in a range of about 1000-2000 Å.
Claim 9
Dependent Claim 23 words
The method according to claim 1 , wherein removing a portion of the first thermal oxide layer is performed by isotropic etching method.
Claim 10
Dependent Claim 23 words
The method according to claim 1 , wherein removing a portion of the first thermal oxide layer is performed using an HF solution.
Claim 11
Dependent Claim 22 words
The method according to claim 1 , wherein after the step of performing the second implantation further includes a step of annealing.

References Cited (Backward Citations)

US4682404A Cited
US5681768A Cited
US5923982A Cited
US5970347A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-03-26 2004-09-25 2005-03-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-03-26 2008-09-25 2009-03-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-03-26 2012-09-25 2013-03-27 $7700.00 Window Closed / Lapsed

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