Current-Limited switch with fast transient response

Claim 2

A current-limited switch comprising: a power MOSFET; a pilot circuit connected in parallel with the power MOSFET, a pilot MOSFET and a pilot resistor being connected in the pilot circuit; a reference circuit comprising a current source and current mirror circuitry, the current mirror circuitry comprising first and second parallel circuits, each parallel circuit comprising a current mirror MOSFET connected in parallel with a resistor, the first and second parallel circuits being connected in series; a difference amplifier having a first input terminal coupled to a point in the pilot circuit and a second terminal coupled to a point in the reference circuit, and having an output terminal coupled to a gate of the power MOSFET; and a current mirror compensation circuit comprising a first bypass switch for forming a short around the first parallel circuit when a voltage at a terminal of the power MOSFET reaches a first level.

Claim 3

The current-limited switch of claim 1 wherein the current mirror compensation circuit comprises a second bypass switch for forming a short around the second parallel circuit when the voltage at the terminal of the power MOSFET reaches a second level.

Claim 4

The current-limited switch of claim 2 wherein the current mirror compensation circuit comprises a voltage-divider circuit, a first node of the voltage divider circuit being coupled to the first bypass switch.

Claim 5

The current-limited switch of claim 3 wherein a second node of the voltage-divider circuit is coupled to the second bypass switch.

Claim 6

The current-limited switch of claim 4 wherein the voltage-divider circuit comprises a plurality of voltage-divider MOSFETs connected in series, the second node being located at a point between two of the voltage-divider MOSFETs.

Claim 7

The current-limited switch of claim 5 wherein a gate terminal and a drain terminal of each voltage-divider MOSFET are shorted together.

Claim 8

The current-limited switch of claim 4 wherein the voltage-divider circuit comprises a plurality circuit paths connected in parallel, the first node being located in a first one of the circuit paths and the second being located in a second one of the circuit paths.

Claim 9

The current-limited switch of claim 7 wherein the first one of the circuit paths contains N voltage-divider MOSFETs and the second one of the circuit paths contains N+1 voltage-divider MOSFETs.

Claim 10

The current-limited switch of claim 8 wherein a gate terminal and a drain terminal of each voltage-divider MOSFET are shorted together.

Claim 11

The current-limited switch of claim 4 wherein the output terminal of the difference amplifier is coupled to the gate terminal of the MOSFET in each parallel circuit.

Claim 12

The current-limited switch of claim 10 wherein the output terminal of the difference amplifier is coupled to a gate terminal of the pilot MOSFET.

Claim 13

A current-limited switch comprising: a power MOSFET; a pilot circuit connected in parallel with the power MOSFET, a first pilot MOSFET and a second pilot MOSFET being connected in the pilot circuit; a reference circuit comprising a current source and current mirror circuitry, the current mirror circuitry comprising first and second parallel circuits, each parallel circuit comprising a first current mirror MOSFET connected in parallel with a second MOSFET, the first and second parallel circuits being connected in series; a difference amplifier having a first input terminal coupled to a point in the pilot circuit and a second terminal coupled to a point in the reference circuit, and having an output terminal coupled to a gate of the power MOSFET; and a current mirror compensation circuit comprising a first bypass switch for forming a short around the first parallel circuit when a voltage at a terminal of the power MOSFET reaches a first level.

Claim 14

A current-limited switch comprising: a power MOSFET; a pilot circuit connected in parallel with the power MOSFET, a first pilot MOSFET and a second pilot MOSFET being connected in the pilot circuit; a reference circuit comprising a current source and current mirror circuitry, the current mirror circuitry comprising first and second parallel circuits, each parallel circuit comprising a first current mirror MOSFET connected in parallel with a second MOSFET, the first and second parallel circuits being connected in series; a difference amplifier having a first input terminal coupled to a point in the pilot circuit and a second terminal coupled to a point in the reference circuit, and having an output terminal coupled to a gate of the power MOSFET; and a current mirror compensation circuit comprising a first bypass switch for forming a short around the first parallel circuit when a voltage at a terminal of the power MOSFET reaches a first level.

Claim 15

The current-limited switch of claim 12 wherein the current mirror compensation circuit comprises a second bypass switch for forming a short around the second parallel circuit when the voltage at the terminal of the power MOSFET reaches a second level.

Claim 16

The current-limited switch of claim 13 wherein the current mirror compensation circuit comprises a voltage-divider circuit, a first node of the voltage divider circuit being coupled to the first bypass switch.

Claim 17

The current-limited switch of claim 14 wherein a second node of the voltage-divider circuit is coupled to the second bypass switch.

Claim 20

The method of claim 16 comprising shorting out a second one of the parallel circuits when the current through the power MOSFET reaches a second level.

Claim 23

The method of claim 18 comprising shorting out a second one of the parallel circuits when the current through the power MOSFET reaches a second level.