US6166443A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device with reduced thickness
Assignee: NEC Corp
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Filing: 1999-04-27
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Granted: 2000-12-26
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Expires: 2019-04-27
Abstract
Abstract Internal electrodes and external lead wiring lines are formed on the front surface of a substrate of a semiconductor device, and solder bumps electrically connected to the external lead wiring lines via through holes are provided on the rear surface of the substrate. A first semiconductor chip is mounted on the surface of the substrate, and a second semiconductor chip is mounted on the rear surface of the substrate. Electrodes of the first semiconductor chip are connected to bonding pads at one side ends of the internal wiring lines, and electrodes of the second semiconductor chip are connected to the bonding pads at the other ends of the internal wiring lines and the external lead wiring lines with bonding wires passing through openings provided in the substrate. The solder bumps are formed with a height equal to or greater than the thickness of the second semiconductor chip so that, when the semiconductor device is mounted on an external mounting board or the like, a gap is formed between the substrate of the semiconductor device and the external mounting board by the height of the solder bumps themselves. The second semiconductor chip mounted on the rear surface of the substrate is accommodated in the gap.
Inventors
- 👤 Takehito Inaba
- 👤 Michihiko Ichinose
- 👤 Kenji Oyachi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:12
CPC Classifications
H; H10; H10W; H10W72/00; H10W74/00; H10W74/10; H10W74/111; H10W70/00; H10W70/40; H10W70/464; H10W70/468; H10W90/00; H10W90/811; H10W46/00; H10W46/601; H10W46/603; H10W72/50; H10W72/541; H10W72/5449; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W90/701; H10W90/731; H10W90/732; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
117 words
A semiconductor device comprising: a substrate having external lead wiring lines formed on its front surface and having solder bumps on its rear surface, said solder bumps being electrically connected to said external lead wiring lines; a first semiconductor chip having electrodes on one of surfaces thereof and mounted on the front surface of said substrate with said electrodes being connected to said external lead wiring lines; and a second semiconductor chip having electrodes on one of surfaces thereof and mounted on the rear surface of said substrate with said electrodes being connected to said external lead wiring lines; said solder bumps having a height equal to or greater than the thickness of said second semiconductor chip.
Claim 2
Dependent Claim
117 words
A semiconductor device comprising: a substrate having external lead wiring lines formed on its front surface and having solder bumps on its rear surface, said solder bumps being electrically connected to said external lead wiring lines; a first semiconductor chip having electrodes on one of surfaces thereof and mounted on the front surface of said substrate with said electrodes being connected to said external lead wiring lines; and a second semiconductor chip having electrodes on one of surfaces thereof and mounted on the rear surface of said substrate with said electrodes being connected to said external lead wiring lines; said solder bumps having a height equal to or greater than the thickness of said second semiconductor chip.
Claim 3
Dependent Claim
87 words
A semiconductor device according to claim 1, wherein said second semiconductor chip is mounted on the rear surface of said substrate with the surface thereof on which said electrodes are formed being directed to the rear surface of said substrate, said substrate has openings formed at portions thereof facing regions of said second semiconductor chip in which said electrodes are formed, and said electrodes of said second semiconductor chip and said external lead wiring lines are connected to each other by bonding wires passing through said openings.
Claim 4
Dependent Claim
125 words
A semiconductor device according to claim 2, wherein said first semiconductor chip is mounted on the front surface of said substrate with the surface thereof on which said electrodes to be connected to said external lead wiring lines are provided serving as a front surface, and internal wiring lines are formed on the front surface of said substrate in such a manner as to encircle said first semiconductor chip, and said electrodes of said first semiconductor chip and one-side ends of said internal wiring lines are connected to each other by bonding wires, while said electrodes of said second semiconductor chip are connected to the other ends of said internal wiring lines and said external lead wiring lines by bonding wires passing through said openings.
Claim 5
Dependent Claim
69 words
A semiconductor device according to claim 1, wherein solder balls are provided at said electrodes of said second semiconductor chip, electrode pads electrically connected to said external lead wiring lines are provided on the rear surface of said substrate, and said second semiconductor chip is bonded by flip chip bonding process to the rear surface of said substrate by the connection of said solder balls to said electrode pads.
Claim 6
Dependent Claim
43 words
A semiconductor device according to claim 1, wherein a die pad is provided on the front surface of said substrate on which said first semiconductor chip is mounted, and said first semiconductor chip is adhered to said die pad with conductive bonding agent.
Claim 7
Dependent Claim
25 words
A semiconductor device according to claim 1, wherein said second semiconductor chip is adhered to the rear surface of said substrate by an adhesive tape.
Claim 8
Dependent Claim
15 words
A semiconductor device according to claim 1, wherein said substrate is a rigid resin substrate.
Claim 9
Dependent Claim
15 words
A semiconductor device according to claim 1, wherein said substrate is a flexible resin substrate.
Claim 10
Independent Claim
126 words
A method of manufacturing a semiconductor device, comprising the steps of: placing a first semiconductor chip, which has electrodes on one of surfaces thereof, on a front surface of a substrate, which has external lead wiring lines formed on the front surface thereof, and connecting electrodes of said first semiconductor chip to said external lead wiring lines; placing a second semiconductor chip, which has electrodes on one of surfaces thereof, on a rear surface of said substrate, and connecting electrodes of said second semiconductor chip to said external lead wiring lines; and providing, on the rear surface of said substrate, solder bumps electrically connected to said external lead wiring lines and having a height equal to or greater than the thickness of said second semiconductor chip.
Claim 11
Independent Claim
126 words
A method of manufacturing a semiconductor device, comprising the steps of: placing a first semiconductor chip, which has electrodes on one of surfaces thereof, on a front surface of a substrate, which has external lead wiring lines formed on the front surface thereof, and connecting electrodes of said first semiconductor chip to said external lead wiring lines; placing a second semiconductor chip, which has electrodes on one of surfaces thereof, on a rear surface of said substrate, and connecting electrodes of said second semiconductor chip to said external lead wiring lines; and providing, on the rear surface of said substrate, solder bumps electrically connected to said external lead wiring lines and having a height equal to or greater than the thickness of said second semiconductor chip.
Claim 12
Dependent Claim
103 words
A method of manufacturing a semiconductor device according to claim 9, further comprising the steps of forming openings at portions of said substrate which face regions of said second semiconductor chip in which said electrodes are provided, wherein said step of placing a second semiconductor chip includes the step of placing said second semiconductor chip on the rear surface of said substrate with the surface thereof on which said electrodes are provided being directed to the rear surface of said substrate, and connecting said electrodes of said second semiconductor chip to said external lead wiring lines by bonding wires passing through said openings.
Claim 13
Dependent Claim
212 words
A method of manufacturing a semiconductor device according to claim 9, further comprising the steps of forming openings at portions of said substrate which face regions of said second semiconductor chip in which said electrodes are provided, and forming internal wiring lines on the front surface of said substrate so as to encircle said first semiconductor chip, wherein said step of placing a first semiconductor chip includes the steps of placing said first semiconductor chip on the front surface of said substrate with the surface thereof on which said electrodes are provided serving as a front surface, and connecting said electrodes of said first semiconductor chip to one ends of said internal wiring lines by bonding wires, said step of placing a second semiconductor chip includes the steps of placing said second semiconductor chip on the rear surface of said substrate with the surface thereof on which said electrodes are provided being directed to the rear surface of said substrate, and connecting said electrodes of said second semiconductor chip to said external lead wiring lines by bonding wires passing through said openings, and further comprising a step of connecting said electrodes of said second semiconductor chip to the other ends of said internal wiring lines by bonding wires passing through said openings.
Claim 14
Dependent Claim
85 words
A method of manufacturing a semiconductor device according to claim 9, further comprising the steps of providing solder balls at said electrodes of said second semiconductor chip and providing electrode pads electrically connected to said external lead wiring lines on the rear surface of said substrate, wherein said step of placing a second semiconductor chip comprises a step of bonding said second semiconductor chip to the rear surface of said substrate by flip chip bonding process by connecting said solder balls to said electrode pads.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-26 | 2004-06-26 | 2004-12-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-26 | 2008-06-26 | 2008-12-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-26 | 2012-06-26 | 2012-12-26 | $7700.00 | Window Closed / Lapsed |