US6163464A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for interconnecting logic boards
Assignee: Hitachi Ltd
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Filing: 1998-08-04
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Granted: 2000-12-19
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Expires: 2018-08-04
Abstract
Abstract Apparatus for interconnecting logic boards is provided with a backplane, a plurality of logic boards connected to the backplane, and a plurality of interconnecting boards, connected to the backplane, for interconnecting the plurality of logic boards. In the apparatus, the plurality of logic boards are connected to the backplane with the logic boards in vertical position at right angles with the interconnecting boards and a specified distance away from the interconnecting boards.
Inventors
- 👤 Kenichi Ishibashi
- 👤 Takehisa Hayashi
- 👤 Tsutomu Goto
- 👤 Akira Yamagiwa
- 👤 Tsuyoshi Watanabe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 12:01
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/16; G06F1/18; G06F1/183; G06F1/185; G06F1/184; G06F1/186; H; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K7/00; H05K7/14; H05K7/1438; H05K7/1439; H05K7/1445
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
53 words
Apparatus for interconnecting logic boards, comprising: a backplane; a plurality of logic boards connected to said backplane; and a plurality of interconnecting boards for interconnecting said plurality of logic boards connected to said backplane, wherein a plurality of wires connecting said logic boards and said interconnecting boards are made substantially equal in length.
Claim 2
Dependent Claim
53 words
Apparatus for interconnecting logic boards, comprising: a backplane; a plurality of logic boards connected to said backplane; and a plurality of interconnecting boards for interconnecting said plurality of logic boards connected to said backplane, wherein a plurality of wires connecting said logic boards and said interconnecting boards are made substantially equal in length.
Claim 3
Dependent Claim
35 words
Apparatus for interconnecting logic boards according to claim 1, wherein said wires connecting said logic boards and said interconnecting boards are substantially equal in length on said logic boards, said interconnecting boards, and said backplane.
Claim 4
Dependent Claim
21 words
Apparatus for interconnecting logic boards according to claim 1, wherein said logic boards are connected to both faces of said backplane.
Claim 5
Dependent Claim
20 words
Apparatus for interconnecting logic boards according to claim 1, wherein said interconnecting boards each have a semiconductor integrated circuit device.
Claim 6
Dependent Claim
22 words
Apparatus for interconnecting logic boards according to claim 1, wherein said semiconductor integrated circuit device on said interconnecting board forms a switch.
Claim 7
Dependent Claim
89 words
Apparatus for interconnecting logic boards according to claim 1, wherein in a semiconductor integrated circuit device on said interconnecting board, after a connector for connecting said interconnecting board and said backplane is divided into regions of the number of said logic boards, I/O pins of said semiconductor integrated circuit device are divided into regions of said number of regions of said connector, and said regions of said connector and said regions of said I/O pins, which are on a one-to-one correspondence, are connected by wires on said interconnecting board.
Claim 8
Dependent Claim
62 words
Apparatus for interconnecting logic boards comprising: a backplane; a plurality of logic boards connected to said backplane; and a plurality of interconnecting boards, connected to said backplane, for interconnecting said plurality of logic boards, wherein said plurality of logic boards are connected to said backplane with said logic boards in a vertical position and a specified distance away from said interconnecting boards.
Claim 9
Dependent Claim
62 words
Apparatus for interconnecting logic boards comprising: a backplane; a plurality of logic boards connected to said backplane; and a plurality of interconnecting boards, connected to said backplane, for interconnecting said plurality of logic boards, wherein said plurality of logic boards are connected to said backplane with said logic boards in a vertical position and a specified distance away from said interconnecting boards.
Claim 10
Dependent Claim
106 words
Apparatus for interconnecting logic boards according to claim 7, wherein connectors for connecting said interconnecting boards and said backplane are divided into regions of the number of said logic boards and said regions are allotted to said logic boards in a designated order, wherein connectors for connecting said logic boards and said backplane are divided into regions of the number of said interconnecting boards and said regions are allotted to said interconnecting boards in a designated order, and wherein said regions of the connectors of said interconnecting boards and said regions of the connectors of said logic boards are connected by wires strung on said backplane.
Claim 11
Dependent Claim
36 words
Apparatus for interconnecting logic boards according to claim 7, wherein the wires for connecting said logic boards and said interconnecting boards are substantially equal in length on said logic boards, said interconnecting boards and said backplane.
Claim 12
Dependent Claim
21 words
Apparatus for interconnecting logic boards according to claim 7, wherein said logic boards are connected on both faces of said backplane.
Claim 13
Dependent Claim
20 words
Apparatus for interconnecting logic boards according to claim 7, wherein said interconnecting boards each include a semiconductor integrated circuit device.
Claim 14
Dependent Claim
23 words
Apparatus for interconnecting logic boards according to claim 7, wherein said semiconductor integrated circuit device provided on said interconnecting board forms a switch.
Claim 15
Dependent Claim
89 words
Apparatus for interconnecting logic boards according to claim 7, wherein in a semiconductor integrated circuit device on said interconnecting board, after a connector for connecting said interconnecting board and said backplane is divided into regions of the number of said logic boards, I/O pins of said semiconductor integrated circuit device are divided into regions of said number of regions of said connector, and said regions of said connector and said regions of said I/O pins, which are on a one-to-one correspondence, are connected by wires on said interconnecting board.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-19 | 2004-06-19 | 2004-12-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-19 | 2008-06-19 | 2008-12-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-19 | 2012-06-19 | 2012-12-19 | $7700.00 | Window Closed / Lapsed |