US6159818A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a container capacitor structure
Assignee: Micron Technology Inc
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Filing: 1999-09-02
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Granted: 2000-12-12
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Expires: 2019-09-02
Abstract
Abstract Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode ("bottom electrodes") of the container capacitor structure. The etch provides a recess between proximal pairs of container capacitor structures, which recess is available for forming additional capacitance. Accordingly, a capacitor dielectric and a top electrode are formed on and adjacent to, respectively, both an interior surface and portions of the exterior surface of the first electrode. Advantageously, surface area common to both the first electrode and second electrodes is increased over using only the interior surface, which provides additional capacitance without a decrease in spacing for clearing portions of the capacitor dielectric and the second electrode away from a contact hole location. Furthermore, such clearing of the capacitor dielectric and the second electrode portions may be done at an upper location of a substrate assembly in contrast to clearing at a bottom location of a contact via.
Inventors
- 👤 D. Mark Durcan
- 👤 Trung T. Doan
- 👤 Roger R. Lee
- 👤 Fernando Gonzalez
- 👤 Er-Xuan Ping
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:09
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/01; H10D1/041; H10D1/042; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/30; H10B12/31; H10B12/318; H10B12/48; H10B12/485; H10D1/60; H10D1/68; H10D1/692; H10D1/694; H10D1/711; H10D1/716; H10B12/312; Y; Y10; Y10S; Y10S257/00; Y10S257/905
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
193 words
A method of providing double-sided capacitance and maintaining a distance between a capacitor and a contact site in a memory device, comprising: encompassing said contact site within an insulation layer; defining a container within said insulation layer, wherein said container is spaced from said contact site; depositing a first conductive layer over said insulation layer, including depositing within said container and over said contact site; removing a first part of said first conductive layer, wherein said first part is outside of said container; recessing a second part of said first conductive layer, wherein said second part is inside of said container; retaining a third part of said first conductive layer, wherein said third part is outside of said container and over said contact site; defining a recess in said insulation layer extending from said container and extending away from said contact site; depositing a capacitor dielectric within said recess and over said second and third part of said first conductive layer; depositing a second conductive layer over said capacitor dielectric; and planarizing said second conductive layer, said capacitor dielectric, and said third part of said first conductive layer down to said insulation layer.
Claim 2
Independent Claim
193 words
A method of providing double-sided capacitance and maintaining a distance between a capacitor and a contact site in a memory device, comprising: encompassing said contact site within an insulation layer; defining a container within said insulation layer, wherein said container is spaced from said contact site; depositing a first conductive layer over said insulation layer, including depositing within said container and over said contact site; removing a first part of said first conductive layer, wherein said first part is outside of said container; recessing a second part of said first conductive layer, wherein said second part is inside of said container; retaining a third part of said first conductive layer, wherein said third part is outside of said container and over said contact site; defining a recess in said insulation layer extending from said container and extending away from said contact site; depositing a capacitor dielectric within said recess and over said second and third part of said first conductive layer; depositing a second conductive layer over said capacitor dielectric; and planarizing said second conductive layer, said capacitor dielectric, and said third part of said first conductive layer down to said insulation layer.
Claim 3
Dependent Claim
44 words
The method in claim 1, further comprising: depositing photoresist over said first conductive layer; patterning said photoresist before said removing and recessing steps; guiding said removing and recessing steps with said photoresist; and removing said photoresist before said step of depositing a capacitor dielectric.
Claim 4
Dependent Claim
61 words
The method in claim 2, wherein said step of patterning said photoresist comprises developing a portion of said photoresist over said contact site and over a portion of said insulation layer, said portion of said insulation layer extending from said contact site to said container, and wherein said portion of said photoresist is coextensive with said portion of said insulation layer.
Claim 5
Dependent Claim
21 words
The method in claim 3, further comprising allowing undeveloped photoresist to remain in said container during said removing and recessing steps.
Claim 6
Dependent Claim
60 words
The method in claim 2, wherein said step of patterning said photoresist comprises developing a portion of said photoresist over said contact site and over a portion of said insulation layer, said portion of said insulation layer extending from said contact site to said container, and wherein said portion of said photoresist extends beyond said portion of said insulation layer.
Claim 7
Dependent Claim
46 words
The method in claim 5, wherein said step of recessing a second part of said first conductive layer comprises: anisotropically etching a first region of said second part uncovered by said photoresist; and isotropically etching a second region of said second part covered by said photoresist.
References Cited (Backward Citations)
US6048763A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-12 | 2004-06-12 | 2004-12-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-12 | 2008-06-12 | 2008-12-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-12 | 2012-06-12 | 2012-12-12 | $7700.00 | Window Closed / Lapsed |