US6156640A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Damascene process with anti-reflection coating
Assignee: United Microelectronics Corp
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Filing: 1998-07-14
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Granted: 2000-12-05
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Expires: 2018-07-14
Abstract
Abstract A method for improving the damascene process window for metallization utilizes an anti-reflective coating to increase the precision of the photolithography process. An inter-layer dielectric and an anti-reflective layer are formed in turn on a semiconductor substrate. The inter-layer dielectric is patterned to form the interconnecting line regions. A conductive layer is then deposited on the semiconductor substrate and fills the interconnecting line regions. The chemical mechanical polish is performed to remove a portion of the conductive layer exceeding the interconnect line regions and simultaneously remove residual portion of said anti-reflective layer.
Inventors
- 👤 Meng-Jin Tsai
- 👤 Yimin Huang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:41
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/084; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10P76/2043; H10W20/031; H10W20/062
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
52 words
A method for improving a damascene process window for metallization, said method comprises: forming a dielectric layer on a semiconductor substrate; forming an anti-reflective layer on said dielectric layer; patterning said dielectric layer, thereby forming interconnect line regions in said dielectric layer; and forming a conductive layer in said interconnect line regions.
Claim 2
Independent Claim
52 words
A method for improving a damascene process window for metallization, said method comprises: forming a dielectric layer on a semiconductor substrate; forming an anti-reflective layer on said dielectric layer; patterning said dielectric layer, thereby forming interconnect line regions in said dielectric layer; and forming a conductive layer in said interconnect line regions.
Claim 3
Dependent Claim
48 words
The method according to claim 1, further comprising the following steps to form plugs before said dielectric layer is formed: forming an inter-layer dielectric on said semiconductor substrate; patterning said inter-layer dielectric to form plug regions in said inter-layer dielectric; and filling said plug regions with conductive material.
Claim 4
Dependent Claim
23 words
The method according to claim 2, further comprising a chemical mechanical polishing to planarize said semiconductor substrate after said plug regions is filled.
Claim 5
Dependent Claim
34 words
The method according to claim 1, wherein said anti-reflective layer is formed of a material selected from the group consisting of a double film of titanium and titanium nitride (Ti/TiN) and silicon oxynitride (SiON).
Claim 6
Dependent Claim
43 words
The method according to claim 1, wherein said interconnect line regions is patterned in said dielectric layer by a photolithography process using I-line as the exposure light source with the anti-reflective layer being formed of double film of titanium and titanium nitride (Ti/TiN).
Claim 7
Dependent Claim
40 words
The method according to claim 1, wherein said interconnect line regions are patterned in said dielectric layer by a photolithography process using deep ultra-violet (DUV) as the exposure light source with the anti-reflective layer being formed of silicon oxynitride (SiON).
Claim 8
Dependent Claim
25 words
The method according to claim 1, further comprising a step for patterning plug regions in said dielectric layer after said interconnect line regions is formed.
Claim 9
Dependent Claim
34 words
The method according to claim 2, further comprising a step for removing a portion of said conductive layer which exceeds said interconnect line regions and simultaneously removing a residual portion of said anti-reflective layer.
Claim 10
Dependent Claim
30 words
The method according to claim 8, wherein said exceeding portion of said conductive layer and said residual portion of said anti-reflective layer are removed by a chemical mechanical polishing process.
Claim 11
Independent Claim
113 words
A method for improving the damascene process window for metallization, said method comprising the steps of: forming an inter-layer dielectric on said semiconductor substrate; patterning said inter-layer dielectric to form the plug regions in said inter-layer dielectric; and filling said plug regions with conductive material; forming a dielectric layer on a semiconductor substrate; forming an anti-reflective layer on said dielectric layer; patterning said dielectric layer, thereby forming the interconnect line regions in said dielectric layer; depositing a conductive layer on said semiconductor substrate, thereby filling said interconnect line regions; and removing a portion of said conductive layer which exceed said interconnect line regions and simultaneously removing a residual portion of said anti-reflective layer.
Claim 12
Independent Claim
113 words
A method for improving the damascene process window for metallization, said method comprising the steps of: forming an inter-layer dielectric on said semiconductor substrate; patterning said inter-layer dielectric to form the plug regions in said inter-layer dielectric; and filling said plug regions with conductive material; forming a dielectric layer on a semiconductor substrate; forming an anti-reflective layer on said dielectric layer; patterning said dielectric layer, thereby forming the interconnect line regions in said dielectric layer; depositing a conductive layer on said semiconductor substrate, thereby filling said interconnect line regions; and removing a portion of said conductive layer which exceed said interconnect line regions and simultaneously removing a residual portion of said anti-reflective layer.
Claim 13
Dependent Claim
23 words
The method according to claim 10, further comprising a chemical mechanical polishing to planarize said semiconductor substrate after said plug regions is filled.
Claim 14
Dependent Claim
34 words
The method according to claim 10, wherein the anti-reflective layer is formed of a material selected from the group consisting of a double film of titanium and titanium nitride (Ti/TiN) and silicon oxynitride (SiON).
Claim 15
Dependent Claim
43 words
The method according to claim 10, wherein said interconnect line regions are patterned in said dielectric layer by a photolithography process using I-line as the exposure light source with the anti-reflective layer being formed of double film of titanium and titanium nitride (Ti/TiN).
Claim 16
Dependent Claim
40 words
The method according to claim 10, wherein said interconnect line regions is patterned in said dielectric layer by a photolithography process using deep ultra-violet (DUV) as the exposure light source with the anti-reflective layer being formed of silicon oxynitride (SiON).
Claim 17
Dependent Claim
30 words
The method according to claim 10, wherein said exceeding portion of said conductive layer and said residual portion of said anti-reflective layer are removed by a chemical mechanical polishing process.
Claim 18
Independent Claim
94 words
A method for improving a damascene process window for metallization, said method comprises: forming a inter-layer dielectric on a semiconductor substrate; forming an anti-reflective layer on said inter-layer dielectric; patterning said inter-layer dielectric, thereby forming the interconnect line regions in said inter-layer dielectric; patterning said inter-layer dielectric, thereby forming the plug regions in said inter-layer dielectric depositing a conductive layer on said semiconductor substrate, thereby filling said interconnect line regions; and removing a portions of said conductive layer which exceed said interconnect line regions and simultaneously removing a residual portion of said anti-reflective layer.
Claim 19
Independent Claim
94 words
A method for improving a damascene process window for metallization, said method comprises: forming a inter-layer dielectric on a semiconductor substrate; forming an anti-reflective layer on said inter-layer dielectric; patterning said inter-layer dielectric, thereby forming the interconnect line regions in said inter-layer dielectric; patterning said inter-layer dielectric, thereby forming the plug regions in said inter-layer dielectric depositing a conductive layer on said semiconductor substrate, thereby filling said interconnect line regions; and removing a portions of said conductive layer which exceed said interconnect line regions and simultaneously removing a residual portion of said anti-reflective layer.
Claim 20
Dependent Claim
34 words
The method according to claim 16, wherein the anti-reflective layer is formed of a material selected from the group consisting of a double film of titanium and titanium nitride (Ti/TiN) and silicon oxynitride (SiON).
Claim 21
Dependent Claim
43 words
The method according to claim 16, wherein said interconnect line regions is patterned in said inter-layer dielectric by a photolithography process using I-line as the exposure light source with the anti-reflective layer being formed of double film of titanium and titanium nitride (Ti/TiN).
Claim 22
Dependent Claim
40 words
The method according to claim 16, wherein said interconnect line regions is patterned in said inter-layer dielectric by a photolithography process using deep ultra-violet (DUV) as the exposure light source with the anti-reflective layer being formed of silicon oxynitride (SiON).
Claim 23
Dependent Claim
30 words
The method according to claim 16, wherein said exceeding portion of said conductive layer and said residual portion of said anti-reflective layer are removed by a chemical mechanical polishing process.
References Cited (Backward Citations)
US5990002A
Cited
US6001730A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2003-12-05 | 2004-06-05 | 2004-12-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-05 | 2008-06-05 | 2008-12-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-05 | 2012-06-05 | 2012-12-05 | $7700.00 | Window Closed / Lapsed |