US6154165A
Expired / Lapsed
US
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Variable clock rate, variable bit-depth analog-to-digital converter
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1998-09-16
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Granted: 2000-11-28
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Expires: 2018-09-16
Abstract
Abstract An integrated circuit includes a variable bit-depth successive approximation analog-to-digital converter. The variable bit-depth successive approximation analog-to-digital converter can select from at least two clock signals of different frequencies to drive the variable bit-depth successive approximation converter for each bit depth application. Within each bit-depth application, the converter may employ more than one clock frequency.
Inventors
- 👤 George Francis Gross, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:30
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/46; H03M1/462
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
103 words
A method of converting analog signals to multibit representation, comprising the steps of: selecting a first bit-depth for converting a first sampled analog signal to a digital representation; selecting a clock signal, having a frequency, to clock a successive approximation circuit based on the first bit-depth to convert the first sampled analog signal to a digital representation; selecting a second bit-depth for converting a second sampled analog signal to a digital representation; and changing the clock signal to a different frequency based on the second bit-depth to clock the successive approximation circuit when converting the second sampled analog signal to a digital representation.
Claim 2
Independent Claim
103 words
A method of converting analog signals to multibit representation, comprising the steps of: selecting a first bit-depth for converting a first sampled analog signal to a digital representation; selecting a clock signal, having a frequency, to clock a successive approximation circuit based on the first bit-depth to convert the first sampled analog signal to a digital representation; selecting a second bit-depth for converting a second sampled analog signal to a digital representation; and changing the clock signal to a different frequency based on the second bit-depth to clock the successive approximation circuit when converting the second sampled analog signal to a digital representation.
Claim 3
Dependent Claim
56 words
The method of converting analog signals as recited in claim 1, wherein the step of selecting the clock signal to convert the first sampled analog signal further comprises: changing the frequency of the clock signal between at least two of the bit determinations when converting at least one of the first and second sampled analog signals.
Claim 4
Dependent Claim
39 words
The method of converting analog signals as recited in claim 1, further comprising: changing the frequency of the clock signal between each of the bit determinations when converting at least one of the first and second sampled analog signals.
Claim 5
Dependent Claim
30 words
A method as recited in claim 1, further comprising: sampling an analog signal to generate a sampled analog signal; and providing the sampled analog signal to the successive approximation circuit.
Claim 6
Dependent Claim
19 words
A method as recited in claim 4, further comprising: clocking the successive approximation circuit with the selected clock signal.
Claim 7
Independent Claim
113 words
A method of converting analog signals to multibit representations, comprising the steps of selecting a first bit-depth for converting a first sampled analog signal to a digital representation; selecting a first clock signal, having a frequency, to clock a successive approximation circuit based on the first bit-depth to convert the first sampled analog signal to a digital representation; selecting a second bit-depth for converting a second sampled analog signal to a digital representation; and selecting a second clock signal, having a frequency different from the frequency of the first clock signal, to clock the successive approximation circuit based on the second bit-depth to convert the second sampled analog signal to a digital representation.
Claim 8
Independent Claim
113 words
A method of converting analog signals to multibit representations, comprising the steps of selecting a first bit-depth for converting a first sampled analog signal to a digital representation; selecting a first clock signal, having a frequency, to clock a successive approximation circuit based on the first bit-depth to convert the first sampled analog signal to a digital representation; selecting a second bit-depth for converting a second sampled analog signal to a digital representation; and selecting a second clock signal, having a frequency different from the frequency of the first clock signal, to clock the successive approximation circuit based on the second bit-depth to convert the second sampled analog signal to a digital representation.
Claim 9
Dependent Claim
49 words
The method of converting analog signals as recited in claim 6, wherein the step of selecting the first clock signal further comprises: changing the frequency of the first clock signal between at least two bit determinations when converting at least one of the first and second sampled analog signals.
Claim 10
Dependent Claim
40 words
The method of converting analog signals as recited in claim 7, further comprising: changing the frequency of the first clock signal between each of the bit determinations when converting at least one of the first and second sampled analog signals.
Claim 11
Independent Claim
118 words
A method of converting analog signals to multibit representations, comprising the steps of: selecting a first bit-depth for converting a first sampled analog signal to a digital representation; selecting a clock signal, having a frequency, to clock a successive approximation circuit based on the bit-depth selected to convert the first sampled analog signal to a digital representation; selecting a second bit-depth for converting a second sampled analog signal to a digital representation; changing the clock signal to a different frequency to clock the successive approximation circuit when converting the second sampled analog signal to a digital representation; sampling an analog signal to generate a sampled analog signal; and providing the sampled analog signal to the successive approximation circuit.
Claim 12
Independent Claim
118 words
A method of converting analog signals to multibit representations, comprising the steps of: selecting a first bit-depth for converting a first sampled analog signal to a digital representation; selecting a clock signal, having a frequency, to clock a successive approximation circuit based on the bit-depth selected to convert the first sampled analog signal to a digital representation; selecting a second bit-depth for converting a second sampled analog signal to a digital representation; changing the clock signal to a different frequency to clock the successive approximation circuit when converting the second sampled analog signal to a digital representation; sampling an analog signal to generate a sampled analog signal; and providing the sampled analog signal to the successive approximation circuit.
Claim 13
Dependent Claim
19 words
A method as recited in claim 9, further comprising: clocking the successive approximation circuit with the selected clock signal.
References Cited (Backward Citations)
US5260705A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-11-28 | 2004-05-29 | 2004-11-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-11-28 | 2008-05-29 | 2008-11-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-11-28 | 2012-05-29 | 2012-11-28 | $7700.00 | Window Closed / Lapsed |