Method for initiating a retrieval procedure in virtual ground arrays

Claim 2

In a memory cell array including a plurality of memory cells, a method for detecting the content of a selected memory cell, the method comprising the steps of: charging a drain of said selected memory cell to a ground potential; charging a source of said selected memory cell to a predetermined voltage potential; detecting the voltage level on said drain; and comparing said detected voltage level with a reference voltage level, thereby producing a comparison result.

Claim 3

The method according to claim 1, further comprising the step of determining the content of said selected memory cell according to said comparison result.

Claim 4

The method according to claim 2, wherein said content is determined as programmed when said comparison result indicates that said detected voltage level is lower than said reference voltage level and wherein said content is determined as erased when said comparison result indicates that said detected voltage level is higher than said reference voltage level.

Claim 5

In a memory cell array including a plurality of memory cells, a method for detecting the content of a selected memory cell, the method comprising the steps of: connecting a source and drain of said selected memory cell to a ground potential voltage source; disconnecting said source from said ground potential voltage source; connecting said source to a voltage source having a predetermined voltage potential; disconnecting said drain from said ground potential voltage source; detecting the voltage level on said drain; and comparing said detected voltage level with a reference voltage level, thereby producing a comparison result.

Claim 6

In a memory cell array including a plurality of memory cells, a method for detecting the content of a selected memory cell, the method comprising the steps of: connecting a source and drain of said selected memory cell to a ground potential voltage source; disconnecting said source from said ground potential voltage source; connecting said source to a voltage source having a predetermined voltage potential; disconnecting said drain from said ground potential voltage source; detecting the voltage level on said drain; and comparing said detected voltage level with a reference voltage level, thereby producing a comparison result.

Claim 7

The method according to claim 4, further comprising the step of determining the content of said selected memory cell according to said comparison result.

Claim 8

The method according to claim 5, wherein said content is determined as programmed when said comparison result indicates that said detected voltage level is lower than said reference voltage level and wherein said content is determined as erased when said comparison result indicates that said detected voltage level is higher than said reference voltage level.

Claim 9

In a memory cell array including a plurality of memory cells having a junction between every two neighboring memory cells and each junction being connected to a bit-line, a method for detecting the content of a selected memory cell, the source of said selected memory cell being connected to a first one of said junctions, the drain end of said selected memory cell being connected to a second one of said junctions, the method comprising the steps of: connecting said junctions to a ground potential voltage source, thereby charging said memory cell array to a ground potential voltage potential; disconnecting said first one of said junctions from said ground potential voltage source; connecting said first one of said junctions to a voltage source, thereby charging said selected memory cell source to a predetermined voltage potential; disconnecting said second one of said junctions from said ground potential voltage source; detecting the voltage level on said second one of said junctions; and comparing said detected voltage level with a reference voltage level, thereby producing a comparison result.

Claim 10

In a memory cell array including a plurality of memory cells having a junction between every two neighboring memory cells and each junction being connected to a bit-line, a method for detecting the content of a selected memory cell, the source of said selected memory cell being connected to a first one of said junctions, the drain end of said selected memory cell being connected to a second one of said junctions, the method comprising the steps of: connecting said junctions to a ground potential voltage source, thereby charging said memory cell array to a ground potential voltage potential; disconnecting said first one of said junctions from said ground potential voltage source; connecting said first one of said junctions to a voltage source, thereby charging said selected memory cell source to a predetermined voltage potential; disconnecting said second one of said junctions from said ground potential voltage source; detecting the voltage level on said second one of said junctions; and comparing said detected voltage level with a reference voltage level, thereby producing a comparison result.

Claim 11

The method according to claim 7, further comprising the step of determining the content of said selected memory cell according to said comparison result.

Claim 12

The method according to claim 8, wherein said content is determined as programmed when said comparison result indicates that said detected voltage level is lower than said reference voltage level and wherein said content is determined as erased when said comparison result indicates that said detected voltage level is higher than said reference voltage level.

Claim 13

In a memory cell array including at least one row, a word line for each row and a plurality of bit-lines, the at least one row including a plurality of memory cells, each of the memory cells including at least a source end and a drain end, said source and drain ends being connected to different ones of the bit-lines, a method for detecting the content of a selected memory cell, the source of said selected memory cell being connected to a first one of the bit-lines, the drain end of said selected memory cell being connected to a second one of the bit-lines, the method comprising the steps of: connecting said bit-lines to a ground potential voltage source, thereby charging said memory cell array to a ground potential voltage potential; disconnecting said first one of said bit-lines from said ground potential voltage source; connecting said first one of said bit-lines to a voltage source, thereby charging said selected memory cell source to a predetermined voltage potential; disconnecting said second one of said bit-lines from said ground potential voltage source; detecting the voltage level on said second one of said bit-lines; and comparing said detected voltage level with a reference voltage level, thereby producing a comparison result.

Claim 14

In a memory cell array including at least one row, a word line for each row and a plurality of bit-lines, the at least one row including a plurality of memory cells, each of the memory cells including at least a source end and a drain end, said source and drain ends being connected to different ones of the bit-lines, a method for detecting the content of a selected memory cell, the source of said selected memory cell being connected to a first one of the bit-lines, the drain end of said selected memory cell being connected to a second one of the bit-lines, the method comprising the steps of: connecting said bit-lines to a ground potential voltage source, thereby charging said memory cell array to a ground potential voltage potential; disconnecting said first one of said bit-lines from said ground potential voltage source; connecting said first one of said bit-lines to a voltage source, thereby charging said selected memory cell source to a predetermined voltage potential; disconnecting said second one of said bit-lines from said ground potential voltage source; detecting the voltage level on said second one of said bit-lines; and comparing said detected voltage level with a reference voltage level, thereby producing a comparison result.

Claim 15

The method according to claim 10, further comprising the step of determining the content of said selected memory cell according to said comparison result.

Claim 16

The method according to claim 11, wherein said content is determined as programmed when said comparison result indicates that said detected voltage level is lower than said reference voltage level and wherein said content is determined as erased when said comparison result indicates that said detected voltage level is higher than said reference voltage level.