US6131135A
Expired / Lapsed
US
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Arbitration method for a system with two USB host controllers
Assignee: Intel Corp
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Filing: 1998-06-30
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Granted: 2000-10-10
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Expires: 2018-06-30
Abstract
Abstract A method and apparatus for coupling multiple USB host controllers to a high speed bus is described. The apparatus uses a USB arbiter to couple multiple USB host controllers to the high speed bus.
Inventors
- 👤 Darren L. Abramson
- 👤 Karthi R. Vadivelu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 05:07
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/36; G06F13/362
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
119 words
For establishing communications with a bus, a circuit comprising: a first universal serial bus (USB) host controller; a second USB host controller; and a USB arbiter to couple the first and second USB host controllers to the bus, the USB arbiter to (i) support a total data flow of more than twelve megabits with the bus being approximately equal to a sum of a first data flow between the first universal serial bus host controller and the universal serial bus arbiter and a second data flow between the second universal serial bus host controller and the universal serial bus arbiter, and (ii) arbitrate between grant request signals from the first USB host controller and the second USB host controller.
Claim 2
Dependent Claim
119 words
For establishing communications with a bus, a circuit comprising: a first universal serial bus (USB) host controller; a second USB host controller; and a USB arbiter to couple the first and second USB host controllers to the bus, the USB arbiter to (i) support a total data flow of more than twelve megabits with the bus being approximately equal to a sum of a first data flow between the first universal serial bus host controller and the universal serial bus arbiter and a second data flow between the second universal serial bus host controller and the universal serial bus arbiter, and (ii) arbitrate between grant request signals from the first USB host controller and the second USB host controller.
Claim 3
Dependent Claim
24 words
The circuit of claim 1 further comprising: a bus interface unit which grants requests to the bus based upon request from the USB arbiter.
Claim 4
Dependent Claim
20 words
The circuit of claim 2 wherein the bus interface unit includes a second arbiter to control access to the bus.
Claim 5
Dependent Claim
15 words
The circuit of claim 1 wherein the bus is a peripheral component interconnect (PCI) bus.
Claim 6
Dependent Claim
35 words
The circuit of claim 1 wherein the first USB host controller includes a first-in/first-out buffer to temporarily store data from a USB device coupled to a first USB port of the first USB host controller.
Claim 7
Dependent Claim
23 words
The circuit of claim 5 wherein the first USB host controller includes a second USB port to couple to an additional USB device.
Claim 8
Dependent Claim
37 words
The circuit of claim 1 wherein the USB arbiter includes a priority solver logic circuit to determine whether the first USB host controller or the second USB host controller had the least recent access to the bus.
Claim 9
Dependent Claim
28 words
The circuit of claim 1 wherein the USB arbiter uses rotating arbitration to select whether the first USB host controller or the second USB host controller receives access.
Claim 10
Dependent Claim
28 words
The circuit of claim 1 wherein the USB arbiter uses fixed arbitration to select whether the first USB host controller or the second USB host controller receives access.
Claim 11
Dependent Claim
43 words
The circuit of claim 1 wherein the USB arbiter is configured to select one initiator handshake signal to generate a selected initiator handshake signal from a plurality of initiator handshake signals from the first USB host controller and the second USB host controller.
Claim 12
Dependent Claim
18 words
The circuit of claim 10 wherein the selected initiator handshake signal is output to a bus interface unit.
Claim 13
Dependent Claim
27 words
The circuit of claim 1 wherein the first USB host controller, the second USB host controller and the USB arbiter are fabricated on a single silicon chip.
Claim 14
Dependent Claim
12 words
The circuit of claim 1 wherein the bus is a multiplexed bus.
Claim 15
Dependent Claim
42 words
The circuit of claim 1 further comprising: a plurality of USB devices including a first USB device coupled to a port of the first USB host controller and a second USB device coupled to a port of the second USB host controller.
Claim 16
Independent Claim
86 words
A method of transferring data between a plurality of Universal Serial Bus (USB) devices and a bus comprising the operations of: determining using a priority solver state machine of a USB arbiter whether a first USB host controller or a second USB host controller has priority; granting access to the bus to one of the first and second USB host controllers which has priority; and arbitrating between a signal from the USB arbiter and other peripherals on the bus using a Peripheral Component Interconnect (PCI) arbiter.
Claim 17
Independent Claim
86 words
A method of transferring data between a plurality of Universal Serial Bus (USB) devices and a bus comprising the operations of: determining using a priority solver state machine of a USB arbiter whether a first USB host controller or a second USB host controller has priority; granting access to the bus to one of the first and second USB host controllers which has priority; and arbitrating between a signal from the USB arbiter and other peripherals on the bus using a Peripheral Component Interconnect (PCI) arbiter.
Claim 18
Dependent Claim
23 words
The method of claim 15 wherein the output of the priority solver state machine is input into a select line of a demultiplexer.
Claim 19
Dependent Claim
27 words
The method of claim 15 further comprising the operation of: forwarding an initiator protocol from the USB host controller which has priority to a bus interface unit.
Claim 20
Dependent Claim
24 words
The method of claim 15 wherein the determining operation grants priority to the USB host controller which least recently had access to the bus.
Claim 21
Dependent Claim
102 words
A USB arbiter for arbitrating among a plurality of USB host controllers comprising: a priority solver logic circuit for determining a USB host controller in the plurality of USB host controllers which least recently had access to a bus; and a selector circuit for granting an access request from the USB host controller selected by the priority solver when a contention occurs, the selector circuit being a demultiplexor including a select line coupled to an output of the priority solver logic and at least one input line of the demultiplexor configured to receive initiator signals from the plurality of USB host controllers.
Claim 22
Dependent Claim
102 words
A USB arbiter for arbitrating among a plurality of USB host controllers comprising: a priority solver logic circuit for determining a USB host controller in the plurality of USB host controllers which least recently had access to a bus; and a selector circuit for granting an access request from the USB host controller selected by the priority solver when a contention occurs, the selector circuit being a demultiplexor including a select line coupled to an output of the priority solver logic and at least one input line of the demultiplexor configured to receive initiator signals from the plurality of USB host controllers.
Claim 23
Dependent Claim
14 words
The USB arbiter of claim 19 wherein the selector circuit is a multiplexer-demultiplexer combination.
Claim 24
Dependent Claim
85 words
Implemented to establish communications with a bus, a system comprising: a circuit including: a first Universal Serial Bus (USB) host controller; a second USB host controller, and a USB arbiter to couple the first USB host controller and the second USB host controller to the bus, the USB arbiter to arbitrate between grant request signals from the first USB host controller and the second USB host controller; and a arbiter to determine when an output of the USB arbiter is granted access to the bus.
Claim 25
Dependent Claim
85 words
Implemented to establish communications with a bus, a system comprising: a circuit including: a first Universal Serial Bus (USB) host controller; a second USB host controller, and a USB arbiter to couple the first USB host controller and the second USB host controller to the bus, the USB arbiter to arbitrate between grant request signals from the first USB host controller and the second USB host controller; and a arbiter to determine when an output of the USB arbiter is granted access to the bus.
Claim 26
Dependent Claim
22 words
The system of claim 21, wherein a total data flow between the USB arbiter and the bus exceeds twelve megabits per second.
Claim 27
Dependent Claim
51 words
The system of claim 21, wherein a total data flow between the USB arbiter and the bus is approximately a sum of a first data flow between the first USB host controller and the USB arbiter and a second data flow between the second USB host controller and the USB arbiter.
Claim 28
Dependent Claim
24 words
The system of claim 21 further comprising: a bus interface unit which grants requests to the bus based upon request from the USB arbiter.
Claim 29
Dependent Claim
37 words
The system of claim 21 wherein the USB arbiter includes a priority solver logic circuit to determine whether the first USB host controller or the second USB host controller had the least recent access to the bus.
Claim 30
Dependent Claim
53 words
The system of claim 25 wherein the USB arbiter includes a demultiplexer, a select line of the demultiplexer is coupled to an output of the priority solver, and a plurality of input lines of the demultiplexer configured to receive initiator signals from the first USB host controller and the second USB host controller.
Claim 31
Dependent Claim
28 words
The system of claim 25 wherein the USB arbiter uses rotating arbitration to select whether the first USB host controller or the second USB host controller receives access.
Claim 32
Dependent Claim
28 words
The system of claim 25 wherein the USB arbiter uses fixed arbitration to select whether the first USB host controller or the second USB host controller receives access.
Claim 33
Dependent Claim
112 words
For establishing communications with a bus, a circuit comprising: a first Universal Serial Bus (USB) host controller; a second USB host controller; a USB arbiter to couple the first USB host controller and the second USB host controller to the bus, the USB arbiter including: a priority solver logic circuit to determine whether the first USB host controller or the second USB host controller had the least recent access to the bus, and a demultiplexer including a select line coupled to an output line of the priority server logic circuit and a plurality of input lines to receive initiator signals from the first USB host controller and the second USB host controller.
Claim 34
Dependent Claim
112 words
For establishing communications with a bus, a circuit comprising: a first Universal Serial Bus (USB) host controller; a second USB host controller; a USB arbiter to couple the first USB host controller and the second USB host controller to the bus, the USB arbiter including: a priority solver logic circuit to determine whether the first USB host controller or the second USB host controller had the least recent access to the bus, and a demultiplexer including a select line coupled to an output line of the priority server logic circuit and a plurality of input lines to receive initiator signals from the first USB host controller and the second USB host controller.
Claim 35
Independent Claim
80 words
A method for transferring data between a plurality of Universal Serial Bus (USB) devices and a bus, comprising: determining using a priority solver state machine of a USB arbiter whether a first USB host controller or a second USB host controller has priority; granting access to the bus to one of the first and second USB host controllers which has priority; and supporting the transfer of the data exceeding twelve megabits per second between the USB arbiter and the bus.
Claim 36
Independent Claim
80 words
A method for transferring data between a plurality of Universal Serial Bus (USB) devices and a bus, comprising: determining using a priority solver state machine of a USB arbiter whether a first USB host controller or a second USB host controller has priority; granting access to the bus to one of the first and second USB host controllers which has priority; and supporting the transfer of the data exceeding twelve megabits per second between the USB arbiter and the bus.
References Cited (Backward Citations)
US5970220A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-10 | 2004-04-10 | 2004-10-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-10 | 2008-04-10 | 2008-10-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-10 | 2012-04-10 | 2012-10-10 | $7700.00 | Window Closed / Lapsed |