US6099161A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Asynchronous analog or digital frequency measurement on digital test equipment
Assignee: IXYS Intl Ltd
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Filing: 1995-12-22
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Granted: 2000-08-08
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Expires: 2015-12-22
Abstract
Abstract A method for use with digital automated test equipment for measuring an asynchronous analog frequency, which analog frequency may be up to at least four times the operational frequency of the digital automated test equipment. From test vectors related to the frequency of interest known to represent good components, a pattern of test vectors with randomly assigned timing sets is created. Then, the maximum number of counts and the period increment is set. The selected pattern of test vectors are then applied to the unit under test and the received waveforms compared to the stored patterns. If there is no match, the period of the timing sets within the frequency range of interest is adjusted by a predetermined increment, and the test is repeated until there is a match. Since the period is now known, the frequency of the asynchronous analog signal can be calculated.
Inventors
- 👤 Igor Furlan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 08:21
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/30; G01R31/3016
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
159 words
A test method for use by automated test equipment which includes a computer to measure the operation of an integrated circuit comprising of: providing a database to a computer, said database including at least patterns of vectors known to represent good components; assign randomly selected timing set to each vector; creating a pattern of test vectors with randomly assigned timing sets, establish a count representing the maximum number of times a set of test vectors will be applied to a device under test; presenting pattern of test vector to predeteremined ports of said integrated circuit; sensing voltage waveform on a particular port of said integrated circuit port; comparing said voltage waveform outputs of said stored patterns; if there is no match adjusting the periodT of timing sets within selected measured frequency range by a predetermined increment until the scanned patterns match the stored patterns; and if there is a match calculating the asynchronous frequency of said device under test.
Claim 2
Dependent Claim
159 words
A test method for use by automated test equipment which includes a computer to measure the operation of an integrated circuit comprising of: providing a database to a computer, said database including at least patterns of vectors known to represent good components; assign randomly selected timing set to each vector; creating a pattern of test vectors with randomly assigned timing sets, establish a count representing the maximum number of times a set of test vectors will be applied to a device under test; presenting pattern of test vector to predeteremined ports of said integrated circuit; sensing voltage waveform on a particular port of said integrated circuit port; comparing said voltage waveform outputs of said stored patterns; if there is no match adjusting the periodT of timing sets within selected measured frequency range by a predetermined increment until the scanned patterns match the stored patterns; and if there is a match calculating the asynchronous frequency of said device under test.
Claim 3
Dependent Claim
27 words
A test method for use by automated test equipment according to claim 1, wherein said predetermined increment by which said timing set are adjusted is 0.1 nanoseconds.
Claim 4
Dependent Claim
77 words
A test method for use by automated test equipment according to claim 1, wherein each vector has either a first randomly assigned timing set or a second randomly assigned timing set, and further including the step of presenting the first randomly assigned timing set to said unit under test during the first half of a scan period, and presenting said second timing randomly assigned timing set during the second half of a scan period, in any order.
Claim 5
Dependent Claim
98 words
A test method for use by automated test equipment according to claim 1, wherein each vector has a first randomly assigned timing set, a second randomly assigned timing set, and a third randomly assigned timing set, and further including the step of presenting either the first randomly assigned timing sets to said unit under test during the first third of a scan period, and presenting said second randomly assigned timing set during the second third of a scan period, and presenting said third randomly assigned timing set during the last third of a scan period, in any order.
Claim 6
Dependent Claim
120 words
A test method for use by automated test equipment according to claim 1, wherein each vector has a first timing randomly assigned timing sets, a second randomly assigned timing set, a third randomly assigned timing set, and a fourth randomly assigned timing set, and further including the step of presenting said first randomly assigned timing sets to said unit under test during the first forth of a scan period, and presenting said second randomly assigned timing set during the second forth of a scan period, and presenting said third randomly assigned timing set during the third forth of a scan period, and presenting said forth randomly assigned timing sets during the last forth of a scan period, in any order.
References Cited (Backward Citations)
US5519879A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-08-08 | 2004-02-07 | 2004-08-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-08-08 | 2008-02-07 | 2008-08-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-08-08 | 2012-02-07 | 2012-08-08 | $7700.00 | Window Closed / Lapsed |