Optimized trench edge formation integrated with high quality gate formation

Abstract

Abstract A semiconductor manufacturing process is provided in which an oxidation retarding species is introduced into regions of the substrate distal from the isolation structures. A subsequent thermal oxidation process results in the formation of a gate dielectric film in which the film thickness proximal to the isolation structures is greater than the film thickness distal from the isolation structures. Broadly speaking, an isolation structure is formed in an isolation region of a semiconductor substrate. A mask is then formed on an upper surface of the semiconductor substrate. The mask covers the isolation structure and portions of the semiconductor substrate proximal to the isolation structure. A nitrogen bearing impurity distribution is then introduced into portions of the semiconductor substrate exposed by the mask. The nitrogen bearing impurity distribution therefore substantially resides within portions of the semiconductor substrate distal from the isolation structures. A gate dielectric is then formed on an upper surface of the semiconductor substrate. An oxidation rate of the distal portions of the semiconductor substrate is less than an oxidation rate of the proximal portions. In this manner, a thickness of the gate oxide is greater over the proximal portions of the substrate than over the distal portions.

Inventors

• 👤 Mark I. Gardner
• 👤 H. Jim Fulford
• 👤 Derick J. Wristers

Bibliographic Details