US6081443A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor memory device
Assignee: Renesas Electronics Corp
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Filing: 1998-12-30
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Granted: 2000-06-27
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Expires: 2018-12-30
Abstract
Abstract In a dynamic random access memory, at a time of body-refresh operation, a bit-line potential VBL is set to a body-refresh-potential VBR, and the body-refresh-potential VBR is supplied to bit-line pairs via a bit-line precharging/equalizing circuit 111c, thereby the charge accumulated in the body of the n channel MOS transistor 72cb in a memory cell is drained to the bit-line pairs.
Inventors
- 👤 Fukashi Morishita
- 👤 Shigeki Tomishima
- 👤 Kazutani Arimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:55
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406; G11C11/4063; G11C11/407; G11C11/4074; G11C11/403; G11C11/404; H; H10; H10D; H10D30/00; H10D30/60; H10D30/711
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
66 words
A semiconductor device comprising: an insulated gate type transistor having a source, a drain, a floating body sandwiched by the source and drain, and a gate formed above the floating body; and a charge draining circuit for draining out charge accumulated in the floating body of said insulated gate type transistor via the source when said insulated gate type transistor is rendered at an off state.
Claim 2
Dependent Claim
66 words
A semiconductor device comprising: an insulated gate type transistor having a source, a drain, a floating body sandwiched by the source and drain, and a gate formed above the floating body; and a charge draining circuit for draining out charge accumulated in the floating body of said insulated gate type transistor via the source when said insulated gate type transistor is rendered at an off state.
Claim 3
Dependent Claim
32 words
The semiconductor device according to claim 1, wherein said insulated gate type transistor is an n channel type transistor, and the polarity of the charge accumulated in the floating body is positive.
Claim 4
Dependent Claim
58 words
The semiconductor device according to claim 1, wherein the gate of said insulated gate type transistor is supplied with a predetermined potential in the off state, and said charge draining circuit applies a potential being at most said predetermined potential to the source of said insulated gate type transistor when draining out charge accumulated in the floating body.
Claim 5
Dependent Claim
15 words
The semiconductor device according to claim 3, wherein said predetermined potential is a ground potential.
Claim 6
Dependent Claim
39 words
The semiconductor device according to claim 3, wherein the potential applied by said charge draining circuit is higher than a potential level which is lower than said predetermined potential by a threshold voltage of said insulated gate type transistor.
Claim 7
Dependent Claim
59 words
The semiconductor device according to claim 1, wherein said charge draining circuit includes a switch applying first potential to the source of said insulated gate type transistor when said insulated gate type transistor is rendered at an on state and applying second potential to the source at the off state, the second potential being lower than the first potential.
Claim 8
Dependent Claim
29 words
The semiconductor device according to claim 6, further comprising a timer, wherein the switch applies the first potential to the source in response to an output of said timer.
Claim 9
Dependent Claim
36 words
The semiconductor device according to claim 6, wherein the gate of said insulated gate type transistor is supplied with a predetermined potential in the off state, and the first potential is higher than the predetermined potential.
Claim 10
Dependent Claim
17 words
The semiconductor device according to claim 8, wherein the second potential is equal to the predetermined potential.
Claim 11
Dependent Claim
33 words
The semiconductor device according to claim 1, further comprising: an insulation layer; and a semiconductor layer formed on said insulating layer, wherein said insulated gate type transistor is formed on said semiconductor layer.
Claim 12
Dependent Claim
18 words
The semiconductor device according to claim 1, wherein said insulated gate type transistor has a vertical Φ-shape structure.
Claim 13
Dependent Claim
50 words
The semiconductor device according to claim 1, further comprising: a conductive region forming a capacitance between the body of said insulated gate type transistor and said conductive region; and a potential control circuit changing the potential of said conductive region in response to an operation of said charge draining circuit.
Claim 14
Dependent Claim
60 words
A semiconductor device according to claim 1, wherein said charge draining circuit includes a potential source to supply a specified potential to said source for draining out charge accumulated in said floating body of said insulated gate type transistor through the floating body-source junction and via said source when said insulated gate type transistor is rendered at an off state.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-06-27 | 2003-12-27 | 2004-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-06-27 | 2007-12-27 | 2008-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-06-27 | 2011-12-27 | 2012-06-27 | $7700.00 | Window Closed / Lapsed |