US6066545A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Birdsbeak encroachment using combination of wet and dry etch for isolation nitride
Assignee: Texas Instruments Inc
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Filing: 1998-12-07
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Granted: 2000-05-23
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Expires: 2018-12-07
Abstract
Abstract A technique for reducing active area encroachment (birdsbeak) by using a polysilicon hard mask combined with both wet and dry etch for the isolation nitride. This process forms a thinner layer of nitride adjacent the openings for oxide growth, which reduces stress at the silicon/nitride interface. The advantages include control over birdsbeak, reliable gate oxide quality, low junction leakage current, an improved active area, improved isolation, low peripheral junction leakage, and higher field transistor threshold voltage.
Inventors
- 👤 Vikram Doshi
- 👤 Hiroshi Ono
- 👤 Takayuki Niuya
- 👤 Hayato Deguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 10:12
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
90 words
A fabrication method for intergrated circuits, comprising the steps of: (a.) forming a nitride layer over a thermal oxide which overlies a semiconductor material; (b.) forming a hardmask layer over said nitride layer; (c.) forming openings in said hardmask layer in locations where isolation structures are desired; (d.) partially etching said nitride layer, through said openings in said hardmask layer, with a primarily isotropic etch; and (e.) after said step (d.), anisotropically etching said nitride layer through said openings in said hardmask layer, to expose portions of said thermal oxide.
Claim 2
Dependent Claim
90 words
A fabrication method for intergrated circuits, comprising the steps of: (a.) forming a nitride layer over a thermal oxide which overlies a semiconductor material; (b.) forming a hardmask layer over said nitride layer; (c.) forming openings in said hardmask layer in locations where isolation structures are desired; (d.) partially etching said nitride layer, through said openings in said hardmask layer, with a primarily isotropic etch; and (e.) after said step (d.), anisotropically etching said nitride layer through said openings in said hardmask layer, to expose portions of said thermal oxide.
Claim 3
Dependent Claim
13 words
The fabrication method of claim 1, wherein said nitride layer is silicon nitride.
Claim 4
Dependent Claim
13 words
The fabrication method of claim 1, wherein said semiconductor material comprises monocrystalline silicon.
Claim 5
Dependent Claim
40 words
The fabrication method of claim 1, further comprising (f.) oxidizing said semiconductor material to form field oxides, using remaining portions of said nitride layer as a mask; whereby said field oxides have a reduced birdsbeak encroachment into said active area.
References Cited (Backward Citations)
US5039625A
Cited
US5702978A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-05-23 | 2003-11-22 | 2004-05-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-05-23 | 2007-11-22 | 2008-05-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-05-23 | 2011-11-22 | 2012-05-23 | $7700.00 | Window Closed / Lapsed |