§
Luxuse
Patent Intelligence
Sign In
← Back to Patent Explorer
US6060775A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Texas Instruments Inc
•
Filing: 1997-07-30
•
Granted: 2000-05-09
•
Expires: 2017-07-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The goal of the present invention is in the manufacture of BGA type semiconductor IC packages, to obviate the processing step in which the through-holes in the insulating substrate are filled with solder paste, and to reduce the thermal stress at the bonding portion of the solder balls. This goal is achieved through the following. Through-holes (2a) are formed on insulating substrate (2) at positions corresponding to the positions where the solder balls are formed. On the surface of the insulating substrate where chip (3) is carried, conductor pattern (6) is formed, with the end [of each portion] of the conductor pattern positioned above through-hole (2a). The region of the aforementioned conductor pattern on each through-hole has portion (6d) protruding into the through-hole. Solder ball (7) is moved and carried on each through-hole to make contact with said bump portion (6d). In this state, the solder balls are melted and bump portions (6d) are directly bonded on solder balls (7). It is possible to form bump portions (6d) by performing buckling processing of the pattern. The bumps formed by buckling processing can reduce the thermal stress applied on these portions.

Inventors

  • 👤 Kazuaki Ano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 18:51
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H05K3/3436; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H05K2201/00; H05K2201/03; H05K2201/0332; H05K2201/0388; H05K2201/0394; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09472; H05K2203/00; H05K2203/04; H05K2203/041; H05K3/40; H05K3/4038; H05K3/4084; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07353; H10W72/075; H10W72/07551; H10W72/07554; H10W72/30; H10W72/331; H10W72/334; H10W72/50; H10W72/541; H10W72/547; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754; Y; Y02; Y02P; Y02P70/00; Y02P70/50

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 85 words
A semiconductor device comprising the following parts: IC chip, an insulating substrate which carries the IC chip and has non-conducting through-holes thereon; a conductor pattern that is formed on the surface of the insulating substrate on a side carrying the IC chip and that is electrically connected to an electrode pad formed on the IC chip and having protrusions formed from the conductor pattern that project into the through-holes; and solder balls bonded to the portions of the conductor pattern which protrude into the through-holes.
Claim 2
Dependent Claim 85 words
A semiconductor device comprising the following parts: IC chip, an insulating substrate which carries the IC chip and has non-conducting through-holes thereon; a conductor pattern that is formed on the surface of the insulating substrate on a side carrying the IC chip and that is electrically connected to an electrode pad formed on the IC chip and having protrusions formed from the conductor pattern that project into the through-holes; and solder balls bonded to the portions of the conductor pattern which protrude into the through-holes.
Claim 3
Dependent Claim 26 words
The semiconductor device of claim 1, wherein the regions of the conductor pattern above the through-holes are subject to buckling processing and protrude inside the through-holes.
Claim 4
Dependent Claim 15 words
The semiconductor device of claim 1, wherein the insulating substrate is a flexible insulating substrate.
Claim 5
Dependent Claim 15 words
The semiconductor device of claim 1, wherein the through-holes are positioned below the IC chip.
Claim 6
Dependent Claim 54 words
The semiconductor device of claim 4, wherein the conductor pattern has land portions, which are connected to the portions protruding into the through-holes, on the outer side of the region of the insulating substrate that carries the IC chip; and that the electrode pad of the IC chip and the land portions are wire-bonded.
Claim 7
Dependent Claim 15 words
The semiconductor device of claim 2, wherein the insulating substrate is a flexible insulating substrate.
Claim 8
Dependent Claim 15 words
The semiconductor device of claim 2, wherein the through-holes are positioned below the IC chip.
Claim 9
Dependent Claim 15 words
The semiconductor device of claim 2, wherein the through-holes are positioned below the IC chip.

References Cited (Backward Citations)

US5239198A Cited
US5753974A Cited
US5583376A Cited
US5598321A Cited
US5640047A Cited
US5708567A Cited
US5886409A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-05-09 2003-11-08 2004-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-05-09 2007-11-08 2008-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-05-09 2011-11-08 2012-05-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag