US6054900A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Power amplifier MMIC and mobile communication terminal
Assignee: Panasonic Holdings Corp
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Filing: 1999-03-09
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Granted: 2000-04-25
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Expires: 2019-03-09
Abstract
Abstract A power amplifier MMIC has a first stage amplifier circuit having a transistor and matching circuits provided on input and output sides of the transistor; a plurality of final stage transistors connected in parallel; a first line connected between adjacent gates of the plurality of final stage amplifiers; a second line, connected between adjacent drains of the plurality of final stage amplifiers, for correcting an input signal phase shift caused by the presence of the first line; and an output matching circuit connected to one of connection points between the second line and the drains, and wherein an output of the first stage amplifier circuit is coupled to one gate of a final stage transistor whose drain is not connected to the output matching circuit, and the first stage amplifier circuit and the plurality of final stage transistors are arranged longitudinally alongside each other.
Inventors
- 👤 Kaoru Ishida
- 👤 Hiroaki Kosugi
- 👤 Isao Nasuno
- 👤 Kazuhiko Nakayama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 13:33
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/60; H03F3/602; H03F3/604; H10; H10W; H10W44/00; H10W44/20; H10W44/226; H10W70/00; H10W70/60; H10W72/00; H10W72/50; H10W72/541; H10W72/5445; H10W72/5449; H10W72/90; H10W72/931; H10W72/932
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
144 words
A power amplifier MMIC comprising: a first stage amplifier circuit having a transistor and matching circuits provided on input and output sides of said transistor; a plurality of final stage transistors connected in parallel; a first line connected between adjacent gates of said plurality of final stage amplifiers; a second line, connected between adjacent drains of said plurality of final stage amplifiers, for correcting an input signal phase shift caused by the presence of said first line; and an output matching circuit connected to one of connection points between said second line and said drains, and wherein: an output of said first stage amplifier circuit is coupled to one gate of a final stage transistor whose drain is not connected to said output matching circuit, and said first stage amplifier circuit and said plurality of final stage transistors are arranged longitudinally alongside each other.
Claim 2
Dependent Claim
144 words
A power amplifier MMIC comprising: a first stage amplifier circuit having a transistor and matching circuits provided on input and output sides of said transistor; a plurality of final stage transistors connected in parallel; a first line connected between adjacent gates of said plurality of final stage amplifiers; a second line, connected between adjacent drains of said plurality of final stage amplifiers, for correcting an input signal phase shift caused by the presence of said first line; and an output matching circuit connected to one of connection points between said second line and said drains, and wherein: an output of said first stage amplifier circuit is coupled to one gate of a final stage transistor whose drain is not connected to said output matching circuit, and said first stage amplifier circuit and said plurality of final stage transistors are arranged longitudinally alongside each other.
Claim 3
Dependent Claim
31 words
A power amplifier MMIC according to claim 1, wherein each of said drains is connected to said second line via an output terminal and a lead of said final stage transistor.
Claim 4
Dependent Claim
85 words
A power amplifier MMIC according to claim 1, wherein said first stage amplifier circuit comprises an input terminal, a first matching circuit connected to said input terminal, a first transistor whose gate is connected to said first matching circuit, a second matching circuit connected to a drain of said first transistor, a second transistor whose gate is connected to said second matching circuit, and a third matching circuit connected to a drain of said second transistor, and said final stage transistors consist of two transistors.
Claim 5
Dependent Claim
85 words
A power amplifier MMIC according to claim 2, wherein said first stage amplifier circuit comprises an input terminal, a first matching circuit connected to said input terminal, a first transistor whose gate is connected to said first matching circuit, a second matching circuit connected to a drain of said first transistor, a second transistor whose gate is connected to said second matching circuit, and a third matching circuit connected to a drain of said second transistor, and said final stage transistors consist of two transistors.
Claim 6
Dependent Claim
137 words
A power amplifier MMIC according to claim 1, wherein said first stage amplifier circuit comprises an input terminal, a first matching circuit connected to said input terminal, a first transistor whose gate is connected to said first matching circuit, a second matching circuit connected to a drain of said first transistor, a second transistor whose gate is connected to said second matching circuit, and a third matching circuit connected to a drain of said second transistor, and said final stage transistors consist of three transistors arrayed in parallel, wherein said third matching circuit in said first stage amplifier is connected to the gate of the final stage transistor located at one end of said parallel array and said output matching circuit is connected to the gate of the final stage transistor located at the other end thereof.
Claim 7
Dependent Claim
137 words
A power amplifier MMIC according to claim 2, wherein said first stage amplifier circuit comprises an input terminal, a first matching circuit connected to said input terminal, a first transistor whose gate is connected to said first matching circuit, a second matching circuit connected to a drain of said first transistor, a second transistor whose gate is connected to said second matching circuit, and a third matching circuit connected to a drain of said second transistor, and said final stage transistors consist of three transistors arrayed in parallel, wherein said third matching circuit in said first stage amplifier is connected to the gate of the final stage transistor located at one end of said parallel array and said output matching circuit is connected to the gate of the final stage transistor located at the other end thereof.
Claim 8
Dependent Claim
40 words
A power amplifier MMIC according to claim 1, wherein the input signal phase shift due to the presence of said first line is chosen to be 90 degrees, and a 90-degree hybrid is used in place of said second line.
Claim 9
Dependent Claim
40 words
A power amplifier MMIC according to claim 2, wherein the input signal phase shift due to the presence of said first line is chosen to be 90 degrees, and a 90-degree hybrid is used in place of said second line.
Claim 10
Dependent Claim
40 words
A power amplifier MMIC according to claim 3, wherein the input signal phase shift due to the presence of said first line is chosen to be 90 degrees, and a 90-degree hybrid is used in place of said second line.
Claim 11
Dependent Claim
43 words
A power amplifier MMIC according to claim 1, wherein the input signal phase shift due to the presence of said first line is chosen to be 180 degrees, and a 180-degree hybrid or a balun is used in place of said second line.
Claim 12
Dependent Claim
43 words
A power amplifier MMIC according to claim 2, wherein the input signal phase shift due to the presence of said first line is chosen to be 180 degrees, and a 180-degree hybrid or a balun is used in place of said second line.
Claim 13
Dependent Claim
43 words
A power amplifier MMIC according to claim 3, wherein the input signal phase shift due to the presence of said first line is chosen to be 180 degrees, and a 180-degree hybrid or a balun is used in place of said second line.
Claim 14
Dependent Claim
76 words
A power amplifier MMIC according to claim 1 for amplifying an output from a mixer including a mobile communication terminal comprising: a signal processing circuit for processing a transmit signal; said mixer for mixing said processed transmit signal; a receive processing circuit for processing a received signal; an antenna; and a duplexer for directing a signal received by said antenna to said receive processing circuit or directing an output signal from said MMIC to said antenna.
Claim 15
Dependent Claim
76 words
A power amplifier MMIC according to claim 2 for amplifying an output from a mixer including a mobile communication terminal comprising: a signal processing circuit for processing a transmit signal; said mixer for mixing said processed transmit signal; a receive processing circuit for processing a received signal; an antenna; and a duplexer for directing a signal received by said antenna to said receive processing circuit or directing an output signal from said MMIC to said antenna.
Claim 16
Dependent Claim
76 words
A power amplifier MMIC according to claim 3 for amplifying an output from a mixer including a mobile communication terminal comprising: a signal processing circuit for processing a transmit signal; said mixer for mixing said processed transmit signal; a receive processing circuit for processing a received signal; an antenna; and a duplexer for directing a signal received by said antenna to said receive processing circuit or directing an output signal from said MMIC to said antenna.
Claim 17
Dependent Claim
76 words
A power amplifier MMIC according to claim 5 for amplifying an output from a mixer including a mobile communication terminal comprising: a signal processing circuit for processing a transmit signal; said mixer for mixing said processed transmit signal; a receive processing circuit for processing a received signal; an antenna; and a duplexer for directing a signal received by said antenna to said receive processing circuit or directing an output signal from said MMIC to said antenna.
Claim 18
Dependent Claim
76 words
A power amplifier MMIC according to claim 7 for amplifying an output from a mixer including a mobile communication terminal comprising: a signal processing circuit for processing a transmit signal; said mixer for mixing said processed transmit signal; a receive processing circuit for processing a received signal; an antenna; and a duplexer for directing a signal received by said antenna to said receive processing circuit or directing an output signal from said MMIC to said antenna.
Claim 19
Dependent Claim
75 words
A power amplifier MMIC according to claim 10 for amplifying an output from a mixer including a mobile communication terminal comprising: a signal processing circuit for processing transmit signal; said mixer for mixing said processed transmit signal; a receive processing circuit for processing a received signal; an antenna; and a duplexer for directing a signal received by said antenna to said receive processing circuit or directing an output signal from said MMIC to said antenna.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-04-25 | 2003-10-25 | 2004-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-04-25 | 2007-10-25 | 2008-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-04-25 | 2011-10-25 | 2012-04-25 | $7700.00 | Window Closed / Lapsed |