Rate 16/17 (0,5) modulation code apparatus and method for partial response magnetic recording channels

Claim 2

Apparatus for providing a codeword from a dataword of binary data for encoding of the binary data on a magnetic media, the apparatus comprising: a storage circuit, coupled to an input stream to receive the dataword, which stores the dataword as first and second bit strings; a processor, coupled to the storage circuit, which determines whether each of the first and second bit strings contains at least one code violation, each code violation corresponding to a given bit sequence, the processor identifying a type and a position of the code violation; and an encoder circuit, coupled to an input stream to receive the dataword, which inserts a pivot bit between the first and second strings and encodes the dataword into the codeword, wherein the encoder circuit encodes by correcting, as necessary, any code violation in the first and second bit strings by 1) setting the inserted pivot bit to a first value, 2) defining values for one or more bits in each of the first and second bit strings as additional pivot bits, the additional pivot bits identifying the type and the position of the code violation, 3) preserving values for bits not included in the given bit sequence corresponding to the code violation, and 4) assigning values, as necessary, for one or more bits of the given bit sequence.

Claim 3

The apparatus for providing the codeword from the dataword as recited in claim 1, wherein, when the processor determines no code violation exists, the encoder circuit sets the inserted pivot bit to a second value and provides the codeword as the first and second bit strings and the inserted pivot bit therebetween set to the second value.

Claim 4

The apparatus for providing the codeword from the dataword as recited in claim 2, wherein: the storage circuit is a shift register, the shift register coupled to the input bit stream to provide the dataword in a accordance with a word clock signal; the processor is a pre-encoding processor which provides a set of logic combination signals based on predetermined bits of the dataword corresponding to a code violation; and the encoder circuit being a multiplexer having a set of selection circuits, the multiplexer coupled to the shift register and each of the set of selection circuits coupled to receive respective bits of the dataword and respective ones of the set of logic combination signals, wherein the set of selection circuits preserves values and assigns values of the bits of the dataword, as necessary, in response to the set of logic combination signals.

Claim 5

The apparatus for providing the codeword from the dataword as recited in claim 3, wherein the dataword corresponds to a sequence of M bits of binary data and the codeword includes N symbols, M and N are integers and N is greater than M, and the storage circuit is a parallel shift register and the apparatus further includes a parallel to serial shift register, the encoder circuit providing the codeword to the parallel to serial shift register, and the parallel to serial shift register converts the codeword to a serial bit stream in accordance with a symbol clock, a period of the word clock equivalent to N periods of the symbol clock.

Claim 6

The apparatus for providing the codeword from the dataword as recited in claim 2, wherein: the dataword corresponds to a sequence of M bits of binary data and the codeword includes N symbols, M and N are integers and N is greater than M, and each code violation is one of a set of code violations, the set of code violations including an end code violation having the given bit sequence corresponding to a first number of consecutive bit values occurring at one end of one of the first and second bits strings, the one end not adjacent to the inserted pivot bit, and the set of code violations including at least one other code violation having the given bit sequence corresponding to a second number of consecutive bit values within one of the first and the second bit strings.

Claim 7

The apparatus for providing the codeword from the dataword as recited in claim 5, wherein a ratio of M/N is 16/17, the first number of consecutive bit values of the end code violation corresponds to three consecutive zero values, and the predetermined number of consecutive bit values of each other code violation corresponds to six consecutive zero values, thereby to form the codeword of a 16/17 (0,5) block code.

Claim 8

The apparatus for providing the codeword from the dataword as recited in claim 1, wherein the apparatus is included in a modulation encoder of a partial response magnetic recording system having a modulation precoder and a magnetic recording head, the codeword is provided to the modulation precoder which precodes the codeword, and the modulation precoded codeword is recorded on the magnetic media by the magnetic recording head.

Claim 9

The apparatus for providing the codeword from the dataword as recited in claim 1, wherein the modulation precoder of the partial response magnetic recording system is a 1/(1)1⊕D 2 ) precoder.

Claim 10

Apparatus for decoding a codeword to provide a dataword representing binary data, the apparatus comprising: a storage circuit, coupled to an input stream to receive the codeword, which stores the codeword as N symbols; a processor, coupled to the storage circuit, which provides a set of pivot bits and preserved bits from the N symbols of the codeword and determines, from the set of pivot bits, whether the dataword includes a code violation, the set of pivot bits identifying a type and position of any code violation in the dataword, each code violation corresponding to a given bit sequence within the dataword; and a decoder circuit which forms the dataword from the preserved bits and the given bit sequence of each code violation in accordance with the set of pivot bits, wherein the decoder circuit decodes by reconstructing, as necessary, any code violation in the dataword as the given bit sequence having the type and at the position as defined by the set of pivot bits, and by assigning the preserved bits to respective locations in the dataword in accordance with the set of pivot bits.

Claim 11

Apparatus for decoding a codeword to provide a dataword representing binary data, the apparatus comprising: a storage circuit, coupled to an input stream to receive the codeword, which stores the codeword as N symbols; a processor, coupled to the storage circuit, which provides a set of pivot bits and preserved bits from the N symbols of the codeword and determines, from the set of pivot bits, whether the dataword includes a code violation, the set of pivot bits identifying a type and position of any code violation in the dataword, each code violation corresponding to a given bit sequence within the dataword; and a decoder circuit which forms the dataword from the preserved bits and the given bit sequence of each code violation in accordance with the set of pivot bits, wherein the decoder circuit decodes by reconstructing, as necessary, any code violation in the dataword as the given bit sequence having the type and at the position as defined by the set of pivot bits, and by assigning the preserved bits to respective locations in the dataword in accordance with the set of pivot bits.

Claim 12

The apparatus for decoding a codeword to provide a dataword representing binary data as recited in claim 9, wherein: the processor is a pre-decoding processor which provides a set of logic combination signals based on selected ones of the N symbols of the codeword; and the decoder circuit is a multiplexer having a set of selection circuits, each of the set of selection circuits coupled to receive respective symbols of the dataword and respective ones of the set of logic combination signals, wherein the set of selection circuits preserves values and assigns values of the symbols of the codeword, as necessary, in response to the set of logic combination signals to form the dataword.

Claim 13

The apparatus for decoding the codeword to provide the dataword as recited in claim 10, wherein the apparatus is included in a modulation decoder of a partial response magnetic recording system having a magnetic read head and a modulation un-precoder, the codeword being precoded and recorded on the magnetic media, the precoded codeword being read from the magnetic media by the magnetic read head and provided to the modulation un-precoder which un-precodes and provides the codeword to the decoder circuit.

Claim 16

The method of encoding as recited in claim 12, further comprising the steps of: (d) setting the inserted pivot bit to a first value when at least one of the first and second strings contains a code violation; and (e) setting the inserted pivot bit to a second value if no code violation exists in the first and second bit strings, the codeword formed by the first and second bit strings and the inserted pivot bit set to the second value therebetween.

Claim 17

The method of encoding as recited in claim 12, wherein each code violation is one of a set of code violations, the set of code violations including an end code violation having the given bit sequence corresponding to a first number of consecutive bit values occurring at one end of one of the first and second bits strings, the one end not adjacent to the inserted pivot bit, and the set of code violations including at least one other code violation having the given bit sequence corresponding to a second number of consecutive bit values within one of the first and the second bit strings.

Claim 18

The method of encoding as recited in claim 14, wherein a ratio of M/N is 16/17, the first number of consecutive bit values of the end code violation corresponds to three consecutive zero values, and the predetermined number of consecutive bit values of each other code violation corresponds to six consecutive zero values, thereby to form the codeword of a 16/17 (0,5) block code.

Claim 21

The method of decoding as recited in claim 16, wherein the codeword is formed by the steps of: (a) dividing the dataword into first and second bit strings and inserting a pivot bit therebetween; (b) determining whether each of the first and second bit strings contains at least one code violation, each code violation corresponding to a given bit sequence; and (c) correcting, as necessary, any code violation in the first and second bit strings by: (c1) defining values for one or more bits in each of the first and second bit strings as additional pivot bits, the additional pivot bits identifying a type and a position of the code violation and the additional pivot bits and the inserted pivot bit forming the set of pivot bits; (c2) preserving values for bits not included in the given bit sequence corresponding to the code violation; and (c3) assigning values, as necessary, for one or more bits of the given bit sequence.

Claim 22

An integrated circuit including an encoding apparatus for providing a codeword from a dataword of binary data for encoding of the binary data on a magnetic media, comprising: memory means, coupled to an input stream for storing the dataword as first and second bit strings; processing means, coupled to the storage circuit, for determining whether each of the first and second bit strings contains at least one code violation, each code violation corresponding to a given bit sequence, the processing means identifying a type and a position of the code violation; encoding means, coupled to an input stream to receive the dataword, for encoding the dataword into the codeword, the encoding means inserting a pivot bit between the first and second strings, wherein the encoding means encodes by correcting, as necessary, any code violation in the first and second bit strings by 1) setting the inserted pivot bit to a first value, 2) defining values for one or more bits in each of the first and second bit strings as additional pivot bits, the additional pivot bits identifying the type and the position of the code violation, 3) preserving values for bits not included in the given bit sequence corresponding to the code violation, and 4) assigning values, as necessary, for one or more bits of the given bit sequence.

Claim 23

An integrated circuit including an encoding apparatus for providing a codeword from a dataword of binary data for encoding of the binary data on a magnetic media, comprising: memory means, coupled to an input stream for storing the dataword as first and second bit strings; processing means, coupled to the storage circuit, for determining whether each of the first and second bit strings contains at least one code violation, each code violation corresponding to a given bit sequence, the processing means identifying a type and a position of the code violation; encoding means, coupled to an input stream to receive the dataword, for encoding the dataword into the codeword, the encoding means inserting a pivot bit between the first and second strings, wherein the encoding means encodes by correcting, as necessary, any code violation in the first and second bit strings by 1) setting the inserted pivot bit to a first value, 2) defining values for one or more bits in each of the first and second bit strings as additional pivot bits, the additional pivot bits identifying the type and the position of the code violation, 3) preserving values for bits not included in the given bit sequence corresponding to the code violation, and 4) assigning values, as necessary, for one or more bits of the given bit sequence.

Claim 24

The encoding apparatus for providing the codeword from the dataword as recited in claim 18, wherein, when the processing means determines no code violation exists, the encoding means sets the inserted pivot bit to a second value and provides the codeword as the first and second bit strings and the inserted pivot bit therebetween set to the second value.

Claim 25

An integrated circuit including a decoding apparatus for decoding a codeword to provide a dataword representing binary data, the apparatus comprising: storage means, coupled to an input stream to receive the codeword, for storing the codeword as N symbols; processing means, coupled to the storage circuit, for providing a set of pivot bits and preserved bits from the N symbols of the codeword and determining, from the set of pivot bits, whether the dataword includes a code violation, the set of pivot bits identifying a type and position of any code violation in the dataword, each code violation corresponding to a given bit sequence within the dataword; and decoding means for forming the dataword from the preserved bits and the given bit sequence of each code violation in accordance with the set of pivot bits. wherein the decoding means decodes by reconstructing, as necessary, any code violation in the dataword as the given bit sequence having the type and at the position as defined by the set of pivot bits, and by assigning the preserved bits to respective locations in the dataword in accordance with the set of pivot bits.

Claim 26

An integrated circuit including a decoding apparatus for decoding a codeword to provide a dataword representing binary data, the apparatus comprising: storage means, coupled to an input stream to receive the codeword, for storing the codeword as N symbols; processing means, coupled to the storage circuit, for providing a set of pivot bits and preserved bits from the N symbols of the codeword and determining, from the set of pivot bits, whether the dataword includes a code violation, the set of pivot bits identifying a type and position of any code violation in the dataword, each code violation corresponding to a given bit sequence within the dataword; and decoding means for forming the dataword from the preserved bits and the given bit sequence of each code violation in accordance with the set of pivot bits. wherein the decoding means decodes by reconstructing, as necessary, any code violation in the dataword as the given bit sequence having the type and at the position as defined by the set of pivot bits, and by assigning the preserved bits to respective locations in the dataword in accordance with the set of pivot bits.