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US6041419A Expired / Lapsed US ⏱️ 0.0 years remaining

Programmable delay timing calibrator for high speed data interface

Assignee: S3 Graphics Co Ltd
•
Filing: 1998-05-27
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Granted: 2000-03-21
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Expires: 2018-05-27
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Abstract

Abstract A graphics processing system incorporates a calibrator module into the system. As a memory module continuously transmits a model data signal, the calibrator module automatically increments the number of stages of delay, which are integrated into a delayed clock signal. Each delayed clock signal triggers the sampling of the model data signal by a plurality of latches. The calibrator module compares each of these sampled data signals with the original model data signals. If the delayed clock signal is properly aligned with the model data signal to cause the two signals to match, the calibrator module stores a result signal in a "1" logic state. If the delayed clock signal is misaligned with the model data signal, the calibrator module will store the result signal in a "0" logic state. When all of the possible stages of delay have been activated by the calibrator module and the corresponding sampled data signals analyzed, a processor module determines the optimum number of stages of delay needed for proper alignment of the delayed clock signal with the transmitted model data signal

Inventors

  • 👤 Chi-Jung Huang
  • 👤 Ken Ming Li

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 00:27
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/04; G06F1/10; G11; G11C; G11C7/00; G11C7/22

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 131 words
A calibration system comprising: a programmable delay module including a plurality of stages of delay for receiving a first signal and for transmitting a second signal, said second signal corresponding to the first signal delayed by a delay value indicative of at least one of the plurality of stages of delay; a latch that responds to the receipt of the second signal by sampling a third signal and transmitting a fourth signal; and a result comparator, coupled to the latch, for comparing the third signal to the fourth signal, for responding to the fourth signal matching the third signal by transmitting a fifth signal having a first logic state and for responding to the fourth signal not matching the third signal by transmitting a fifth signal having a second logic state.
Claim 2
Dependent Claim 131 words
A calibration system comprising: a programmable delay module including a plurality of stages of delay for receiving a first signal and for transmitting a second signal, said second signal corresponding to the first signal delayed by a delay value indicative of at least one of the plurality of stages of delay; a latch that responds to the receipt of the second signal by sampling a third signal and transmitting a fourth signal; and a result comparator, coupled to the latch, for comparing the third signal to the fourth signal, for responding to the fourth signal matching the third signal by transmitting a fifth signal having a first logic state and for responding to the fourth signal not matching the third signal by transmitting a fifth signal having a second logic state.
Claim 3
Dependent Claim 23 words
The calibration system of claim 1 further comprising: a result logger module coupled to the result comparator module for storing the fifth signal.
Claim 4
Dependent Claim 17 words
The calibration system of claim 2, wherein the result logger module is a plurality of shift registers.
Claim 5
Dependent Claim 27 words
The calibration system of claim 1, further comprising: a logger controller module coupled to a result logger module for associating the fifth signal with the delay value.
Claim 6
Dependent Claim 35 words
The calibration system of claim 1 further comprising a delay controller module coupled to the programmable delay module for automatically varying the number of the plurality of stages of delay within the programmable delay module.
Claim 7
Dependent Claim 35 words
The calibration system of claim 2 further comprising a delay controller module coupled to the programmable delay module for automatically varying the number of the plurality of stages of delay within the programmable delay module.
Claim 8
Dependent Claim 35 words
The calibration system of claim 4 further comprising a delay controller module coupled to the programmable delay module for automatically varying the number of the plurality of stages of delay within the programmable delay module.
Claim 9
Dependent Claim 121 words
A calibration method relying upon a programmable delay including a plurality of stages of delay, wherein said method comprises the steps of: receiving a first signal and transmitting a second signal, said second signal corresponding to the first signal delayed by a delay value indicative of at least one of the plurality of stages of delay; responding to receipt of the second signal by sampling a third signal and transmitting a fourth signal; comparing the third signal to the fourth signal; responding to the fourth signal matching the third signal by transmitting a fifth signal having a first logic state; and responding to the fourth signal not matching the third signal by transmitting a fifth signal having a second logic state.
Claim 10
Dependent Claim 121 words
A calibration method relying upon a programmable delay including a plurality of stages of delay, wherein said method comprises the steps of: receiving a first signal and transmitting a second signal, said second signal corresponding to the first signal delayed by a delay value indicative of at least one of the plurality of stages of delay; responding to receipt of the second signal by sampling a third signal and transmitting a fourth signal; comparing the third signal to the fourth signal; responding to the fourth signal matching the third signal by transmitting a fifth signal having a first logic state; and responding to the fourth signal not matching the third signal by transmitting a fifth signal having a second logic state.
Claim 11
Dependent Claim 14 words
The method of claim 8 further comprising the step of storing the fifth signal.
Claim 12
Dependent Claim 32 words
The method of claim 9 wherein storing the fifth signal further comprises the step of shifting the storage of the fifth signal from a first shift register to a second shift register.
Claim 13
Dependent Claim 18 words
The method of claim 8 further comprising the step of associating the fifth signal with the delay value.
Claim 14
Dependent Claim 32 words
The method of claim 8 further comprising the step of automatically varying a delay value indicative of at least one of the plurality of stages of delay within the programmable delay module.
Claim 15
Dependent Claim 18 words
The method of claim 8 further comprising the step of determining an optimum value for the delay value.
Claim 16
Dependent Claim 32 words
The method of claim 9 further comprising the step of automatically varying a delay value indicative of at least one of the plurality of stages of delay within the programmable delay module.
Claim 17
Dependent Claim 32 words
The method of claim 11 further comprising the step of automatically varying a delay value indicative of at least one of the plurality of stages of delay within the programmable delay module.
Claim 18
Dependent Claim 129 words
A program storage device readable by a machine, tangibly embodying a program of instructions executable by a processor to perform method steps for calibrating a system, said method steps comprising: receiving a first signal and transmitting a second signal, said second signal corresponding to the first signal delayed by a delay value indicative of at least one of the plurality of stages of delay; responding to receipt of the second signal by sampling a third signal and transmitting a fourth signal; comparing the third signal to the fourth signal; responding to the fourth signal matching the third signal by transmitting a fifth signal having a first logic state; and responding to the fourth signal not matching the third signal by transmitting a fifth signal having a second logic state.
Claim 19
Dependent Claim 129 words
A program storage device readable by a machine, tangibly embodying a program of instructions executable by a processor to perform method steps for calibrating a system, said method steps comprising: receiving a first signal and transmitting a second signal, said second signal corresponding to the first signal delayed by a delay value indicative of at least one of the plurality of stages of delay; responding to receipt of the second signal by sampling a third signal and transmitting a fourth signal; comparing the third signal to the fourth signal; responding to the fourth signal matching the third signal by transmitting a fifth signal having a first logic state; and responding to the fourth signal not matching the third signal by transmitting a fifth signal having a second logic state.
Claim 20
Dependent Claim 25 words
The program storage device readable by a machine of claim 16, wherein said method steps further comprises associating the fifth signal with the delay value.
Claim 21
Dependent Claim 39 words
The program storage device readable by a machine of claim 16, wherein said method steps further comprises automatically varying a delay value indicative of at least one of the plurality of stages of delay within the programmable delay module.
Claim 22
Dependent Claim 25 words
The program storage device readable by a machine of claim 16, wherein said method steps further comprises determining an optimum value for the delay value.

References Cited (Backward Citations)

US5020038A Cited
US5045811A Cited
US5376849A Cited
US5523792A Cited
US5692165A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-03-21 2003-09-20 2004-03-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-03-21 2007-09-20 2008-03-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-03-21 2011-09-20 2012-03-21 $7700.00 Window Closed / Lapsed

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