US6010914A
Expired / Lapsed
US
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Method for manufacturing a semiconductor device
Assignee: NEC Electronics Corp
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Filing: 1997-10-28
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Granted: 2000-01-04
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Expires: 2017-10-28
Abstract
Abstract A method for manufacturing a semiconductor device comprises the steps of forming consecutively a silicon oxide layer and a test epitaxial layer in a test pattern area on a silicon wafer, forming an epitaxial layer in a product area for semiconductor devices and on the test epitaxial layer simultaneously, measuring a total thickness of the epitaxial layer and the test epitaxial layer formed in the test pattern area by infrared interference, and determining the thickness of the epitaxial layer formed in the product area based on the total thickness to control the thickness of the epitaxial layer in the product area. A thickness control for a very thin epitaxial layer can be obtained.
Inventors
- 👤 Seiichi Shishiguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 03:22
CPC Classifications
H; H10; H10P; H10P74/00; H10P74/27; H10P74/277; H10P74/20; H10P74/203
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
167 words
A method for manufacturing a semiconductor device comprising the steps of: (a) disposing a test pattern area on a silicon wafer outside a product area of said silicon wafer, (b) forming a first layer on said test pattern area having a layer of material with a different refractive index from that of Si; (c) forming a first poly Si layer on top of said first layer on said test pattern area; (d) forming an epitaxial layer in said product area and simultaneously forming a second poly Si layer on said first poly Si layer in said test pattern area, (e) measuring a thickness of one of (i) the first poly Si layer and (ii) the total thickness of said first poly Si layer and the second poly Si layer using visible light optical interference techniques; and (f) determining from the measuring step the thickness of said second poly Si layer; and (g) determining from said second poly Si layer the thickness of the simultaneously formed epitaxial layer.
Claim 2
Independent Claim
167 words
A method for manufacturing a semiconductor device comprising the steps of: (a) disposing a test pattern area on a silicon wafer outside a product area of said silicon wafer, (b) forming a first layer on said test pattern area having a layer of material with a different refractive index from that of Si; (c) forming a first poly Si layer on top of said first layer on said test pattern area; (d) forming an epitaxial layer in said product area and simultaneously forming a second poly Si layer on said first poly Si layer in said test pattern area, (e) measuring a thickness of one of (i) the first poly Si layer and (ii) the total thickness of said first poly Si layer and the second poly Si layer using visible light optical interference techniques; and (f) determining from the measuring step the thickness of said second poly Si layer; and (g) determining from said second poly Si layer the thickness of the simultaneously formed epitaxial layer.
Claim 3
Dependent Claim
14 words
The method as recited in claim 1 wherein said first layer comprises Si oxide.
Claim 4
Dependent Claim
14 words
The method as recited in claim 1 wherein said first layer comprises Si nitride.
Claim 5
Dependent Claim
31 words
The method as recited in claim 1 further comprising the step of stopping the formation of the epitaxial layer in said product area based on said thickness determined in step g).
Claim 6
Dependent Claim
23 words
The method as recited in claim 1 wherein step d) comprises the step of forming a Si epitaxial layer in said product area.
Claim 7
Dependent Claim
24 words
The method as recited in claim 1 wherein step d) comprises the step of: i) forming a Si-Ge epitaxial layer in said product area.
Claim 8
Dependent Claim
35 words
The method as recited in claim 1 wherein step d) comprises the step of: i) forming a Si-Ge epitaxial layer in said product area and simultaneously forming a second poly Si layer formed of Si-Ge.
Claim 9
Dependent Claim
49 words
The method as recited in claim 7 wherein said measuring step comprises the step of: measuring the total thickness of said first poly Si layer, said second poly Si layer formed of Si-Ge and said first layer having a material with a different refractive index from that of Si.
Claim 10
Independent Claim
113 words
A method for manufacturing a semiconductor device comprising the steps of: a) disposing a test pattern area on a silicon wafer outside a product area of said silicon wafer, b) forming a buried layer on said test pattern area, said buried layer having a different refractive index from that of Si; c) forming an epitaxial Si layer in said product area and simultaneously forming an epitaxial poly Si layer on said test pattern area above said buried layer, d) measuring a thickness above said buried layer before and after step c), e) determining from the difference between said after and before measurements of step d) the thickness of said epitaxial poly Si layer.
Claim 11
Independent Claim
113 words
A method for manufacturing a semiconductor device comprising the steps of: a) disposing a test pattern area on a silicon wafer outside a product area of said silicon wafer, b) forming a buried layer on said test pattern area, said buried layer having a different refractive index from that of Si; c) forming an epitaxial Si layer in said product area and simultaneously forming an epitaxial poly Si layer on said test pattern area above said buried layer, d) measuring a thickness above said buried layer before and after step c), e) determining from the difference between said after and before measurements of step d) the thickness of said epitaxial poly Si layer.
Claim 12
Dependent Claim
70 words
The method as recited in claim 9 wherein said forming step c) includes: i) forming an epitaxial Si-Ge layer in said product area and simultaneously forming an epitaxial poly Si-Ge layer on said test pattern area above said buried layer and said measuring step d) includes measuring the thickness in said test pattern area of said epitaxial poly Si-Ge said Si layer above said buried layer and said buried layer.
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