High data rate spread spectrum transceiver and associated methods

Claim 2

A spread spectrum radio transceiver comprising: a baseband processor and a radio circuit connected thereto, said baseband processor comprising a demodulator for spread spectrum phase shift keying (PSK) demodulating information received from said radio circuit, at least one analog-to-digital (A/D) converter having an output connected to said demodulator and an input AC-coupled to said radio circuit, said demodulator comprising at least one modified Walsh code function correlator for decoding information according to a modified Walsh code reducing an average DC signal component which in combination with the AC-coupling to said at least one A/D converter enhances overall performance, and a modulator for spread spectrum PSK modulating information for transmission via the radio circuit, said modulator comprising at least one modified Walsh code function encoder for encoding information according to the modified Walsh code.

Claim 3

A spread spectrum radio transceiver according to claim 1 wherein said modulator comprises means for operating in one of first format defined by bi-phase PSK (BPSK) modulation at a first data rate and a second format defined by quadrature PSK (QPSK) modulation at a second data rate; and wherein said demodulator comprises means for operating in one of the first and second formats.

Claim 4

A spread spectrum radio transceiver according to claim 2 wherein said modulator comprises header modulator means for modulating data packets to include a header at a third format defined by a predetermined modulation at a third data rate and variable data in one of the first and second formats; and wherein said demodulator comprises header demodulator means for demodulating data packets by demodulating the header at the third format and for switching to the respective one of the first and second formats of the variable data after the header.

Claim 5

A spread spectrum radio transceiver according to claim 3 wherein the predetermined modulation of the third format is differential BPSK (DBPSK), and wherein the third data rate is lower than the first and second data rates.

Claim 6

A spread spectrum radio transceiver according to claim 3 wherein said demodulator further comprises: a first carrier tracking loop for the third format; and a second carrier tracking loop for the first and second formats.

Claim 7

A spread spectrum radio transceiver according to claim 5 wherein said second carrier tracking loop comprises: a carrier numerically controlled oscillator (NCO); and carrier NCO control means for selectively operating said carrier NCO based upon a carrier phase of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 8

A spread spectrum radio transceiver according to claim 5 wherein said second carrier tracking loop comprises: a carrier loop filter; and carrier loop filter control means for selectively operating said carrier loop filter based upon a frequency of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 9

A spread spectrum radio transceiver according to claim 1 wherein said modulator further comprises means for partitioning data into four bit nibbles of sign (one bit) and magnitude (three bits) to said at least one modified Walsh code function encoder.

Claim 10

A spread spectrum radio transceiver according to claim 1 wherein the modified Walsh code is a Walsh code modified by a modulo two addition of a fixed hexadecimal code thereto.

Claim 11

A spread spectrum radio transceiver according to claim 1 wherein said at least one modified Walsh code function correlator comprises: a modified Walsh function generator; and a plurality of parallel connected correlators connected to said modified Walsh function generator.

Claim 12

A spread spectrum radio transceiver according to claim 1 wherein said modulator comprises spreading means for spreading each data bit using a pseudorandom (PN) sequence at a predetermined chip rate and preamble modulating means for generating a preamble; and wherein said demodulator comprises preamble demodulator means for demodulating the preamble for achieving initial PN sequence synchronization.

Claim 13

A spread spectrum radio transceiver according to claim 1 wherein said modulator comprises a scrambler; and wherein said demodulator comprises a descrambler.

Claim 14

A spread spectrum radio transceiver according to claim 1 wherein said demodulator comprises clear channel assessing means for generating a clear channel assessment signal.

Claim 15

A spread spectrum radio transceiver according to claim 1 wherein said radio circuit comprises: a quadrature intermediate frequency modulator/demodulator connected to said baseband processor; and an up/down frequency converter connected to said quadrature intermediate frequency modulator/demodulator.

Claim 16

A spread spectrum radio transceiver according to claim 14 wherein said radio circuit further comprises: a low noise amplifier having an output connected to an input of said up/down converter; and a radio frequency power amplifier having an input connected to an output of said up/down converter.

Claim 17

A spread spectrum radio transceiver according to claim 15 further comprising: an antenna; and an antenna switch for switching said antenna between the output of said radio frequency power amplifier and the input of said low noise amplifier.

Claim 18

A baseband processor for a spread spectrum radio transceiver, said baseband processor comprising: a demodulator for spread spectrum phase shift keying (PSK) demodulating; at least one analog-to-digital (A/D) converter having an output connected to said demodulator and an input AC-coupled to receive information; said demodulator comprising at least one predetermined orthogonal code function correlator for decoding information according to a predetermined orthogonal code reducing an average DC signal component to thereby increase AC-coupling to said at least one A/D converter; and a modulator for spread spectrum PSK modulating information for transmission, said modulator comprising at least one predetermined orthogonal code function encoder for encoding information according to the predetermined orthogonal code.

Claim 19

A baseband processor for a spread spectrum radio transceiver, said baseband processor comprising: a demodulator for spread spectrum phase shift keying (PSK) demodulating; at least one analog-to-digital (A/D) converter having an output connected to said demodulator and an input AC-coupled to receive information; said demodulator comprising at least one predetermined orthogonal code function correlator for decoding information according to a predetermined orthogonal code reducing an average DC signal component to thereby increase AC-coupling to said at least one A/D converter; and a modulator for spread spectrum PSK modulating information for transmission, said modulator comprising at least one predetermined orthogonal code function encoder for encoding information according to the predetermined orthogonal code.

Claim 20

A baseband processor according to claim 17 wherein said modulator comprises means for operating in one of first format defined by bi-phase PSK (BPSK) modulation at a first data rate and a second format defined by quadrature PSK (QPSK) modulation at a second data rate; and wherein said demodulator comprises means for operating in one of the first and second formats.

Claim 21

A baseband processor according to claim 18 wherein said modulator comprises header modulator means for modulating data packets to include a header at a third format defined by a predetermined modulation at a third data rate and variable data in one of the first and second formats; and wherein said demodulator comprises header demodulator means for demodulating data packets by demodulating the header at the third format and for switching to the respective one of the first and second formats of the variable data after the header.

Claim 22

A baseband processor according to claim 19 wherein the predetermined modulation of the third format is differential BPSK (DBPSK), and wherein the third data rate is lower than the first and second data rates.

Claim 23

A baseband processor according to claim 19 wherein said demodulator further comprises: a first carrier tracking loop for the third format; and a second carrier tracking loop for the first and second formats.

Claim 24

A baseband processor according to claim 21 wherein said second carrier tracking loop comprises: a carrier numerically controlled oscillator (NCO); and carrier NCO control means for selectively operating said carrier NCO based upon a carrier phase of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 25

A baseband processor according to claim 21 wherein said second carrier tracking loop comprises: a carrier loop filter; and carrier loop filter control means for selectively operating said carrier loop filter based upon a frequency of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 26

A baseband processor according to claim 17 wherein said modulator further comprises means for partitioning data into four bit nibbles of sign (one bit) and magnitude (three bits) to said at least one predetermined orthogonal code function encoder.

Claim 27

A baseband processor according to claim 17 wherein the predetermined orthogonal code is a Walsh code modified by a modulo two addition of a fixed hexadecimal code thereto.

Claim 28

A baseband processor according to claim 17 wherein the predetermined orthogonal code is a bi-orthogonal code.

Claim 29

A baseband processor according to claim 17 wherein said at least one predetermined orthogonal code function correlator comprises: a predetermined orthogonal code function generator; and a plurality of parallel connected correlators connected to said predetermined orthogonal code function generator.

Claim 30

A baseband processor according to claim 17 wherein said modulator comprises spreading means for spreading each data bit using a pseudorandom (PN) sequence at a predetermined chip rate and preamble modulating means for generating a preamble; and wherein said demodulator comprises preamble demodulator means for demodulating the preamble for achieving initial PN sequence synchronization.

Claim 31

A baseband processor according to claim 17 wherein said modulator comprises a scrambler; and wherein said demodulator comprises a descrambler.

Claim 32

A baseband processor for a spread spectrum radio transceiver, said baseband processor comprising: a modulator for spread spectrum phase shift keying (PSK) modulating information for transmission, said modulator comprising at least one encoder for encoding information for transmission, means for operating in one of a first format defined by bi-phase PSK (BPSK) modulation at a first data rate and a second format defined by quadrature PSK (QPSK) modulation at a second data rate, header modulator means for modulating data packets to include a header at a third format defined by a predetermined modulation at a third data rate and variable data in one of the first and second formats; and a demodulator for spread spectrum PSK demodulating received information, said demodulator comprising at least one correlator for decoding received information, means for operating in one of the first and second formats, header demodulator means for demodulating data packets by demodulating the header at the third format and for switching to the respective one of the first and second formats of the variable data after the header, a first carrier tracking loop for the third format, and a second carrier tracking loop for the first and second formats.

Claim 33

A baseband processor for a spread spectrum radio transceiver, said baseband processor comprising: a modulator for spread spectrum phase shift keying (PSK) modulating information for transmission, said modulator comprising at least one encoder for encoding information for transmission, means for operating in one of a first format defined by bi-phase PSK (BPSK) modulation at a first data rate and a second format defined by quadrature PSK (QPSK) modulation at a second data rate, header modulator means for modulating data packets to include a header at a third format defined by a predetermined modulation at a third data rate and variable data in one of the first and second formats; and a demodulator for spread spectrum PSK demodulating received information, said demodulator comprising at least one correlator for decoding received information, means for operating in one of the first and second formats, header demodulator means for demodulating data packets by demodulating the header at the third format and for switching to the respective one of the first and second formats of the variable data after the header, a first carrier tracking loop for the third format, and a second carrier tracking loop for the first and second formats.

Claim 34

A baseband processor according to claim 30 wherein the predetermined modulation of the third format is differential BPSK (DBPSK), and wherein the third data rate is lower than the first and second data rates.

Claim 35

A baseband processor according to claim 30 wherein said second carrier tracking loop comprises: a carrier numerically controlled oscillator (NCO); and carrier NCO control means for selectively operating said carrier NCO based upon a carrier phase of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 36

A baseband processor according to claim 30 wherein said second carrier tracking loop comprises: a carrier loop filter; and carrier loop filter control means for selectively operating said carrier loop filter based upon a frequency of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 37

A baseband processor according to claim 30 wherein said modulator comprises spreading means for spreading each data bit using a pseudorandom (PN) sequence at a predetermined chip rate and preamble modulating means for generating a preamble; and wherein said demodulator comprises preamble demodulator means for demodulating the preamble for achieving initial PN sequence synchronization.

Claim 38

A baseband processor according to claim 30 wherein said modulator comprises a scrambler; and wherein said demodulator comprises a descrambler.

Claim 39

A modulator for a spread spectrum radio transceiver, said modulator comprising: modulator means for spread spectrum phase shift keying (PSK) modulating information for transmission, said modulator means comprising at least one predetermined orthogonal code function encoder for encoding information according to a predetermined orthogonal code for reducing an average DC signal component.

Claim 40

A modulator for a spread spectrum radio transceiver, said modulator comprising: modulator means for spread spectrum phase shift keying (PSK) modulating information for transmission, said modulator means comprising at least one predetermined orthogonal code function encoder for encoding information according to a predetermined orthogonal code for reducing an average DC signal component.

Claim 41

A modulator according to claim 36 wherein said modulator means comprises means for operating in one of first format defined by bi-phase PSK (BPSK) modulation at a first data rate and a second format defined by quadrature PSK (QPSK) modulation at a second data rate.

Claim 42

A modulator according to claim 37 wherein said modulator means comprises header modulator means for modulating data packets to include a header at a third format defined by a predetermined modulation at a third data rate and variable data in one of the first and second formats.

Claim 43

A modulator according to claim 38 wherein the predetermined modulation of the third format is differential BPSK (DBPSK), and wherein the third data rate is lower than the first and second data rates.

Claim 44

A modulator according to claim 36 wherein said modulator means further comprises means for partitioning data into four bit nibbles of sign (one bit) and magnitude (three bits) to said at least one predetermined orthogonal code function encoder, and wherein the predetermined orthogonal code is a Walsh code modified by a modulo two addition of a fixed hexadecimal code thereto.

Claim 45

A modulator according to claim 36 wherein said at least one predetermined orthogonal code function correlator comprises: a predetermined orthogonal code function generator; and a plurality of parallel connected correlators connected to said predetermined orthogonal code function generator.

Claim 46

A modulator according to claim 36 wherein the predetermined orthogonal code is a Walsh code modified by a modulo two addition of a fixed hexadecimal code thereto.

Claim 47

A modulator according to claim 36 wherein the predetermined orthogonal code is a bi-orthogonal code.

Claim 48

A demodulator for a spread spectrum radio transceiver, said demodulator comprising: demodulator means for spread spectrum phase shift keying (PSK) demodulating information received from said radio circuit, said demodulator means comprising at least one predetermined orthogonal code function correlator for decoding information according to a predetermined orthogonal code reducing an average DC signal component.

Claim 49

A demodulator for a spread spectrum radio transceiver, said demodulator comprising: demodulator means for spread spectrum phase shift keying (PSK) demodulating information received from said radio circuit, said demodulator means comprising at least one predetermined orthogonal code function correlator for decoding information according to a predetermined orthogonal code reducing an average DC signal component.

Claim 50

A demodulator according to claim 44 wherein said demodulator means comprises means for operating in one of first format defined by bi-phase PSK (BPSK) modulation at a first data rate and a second format defined by quadrature PSK (QPSK) modulation at a second data rate.

Claim 51

A demodulator according to claim 45 wherein said demodulator means comprises header demodulator means for demodulating data packets including a header in a third format defined by a predetermined modulation at a third data rate and variable data in one of the first and second formats, and for switching to the respective one of the first and second formats of the variable data after the header.

Claim 52

A demodulator according to claim 46 wherein the predetermined modulation of the third format is differential BPSK (DBPSK), and wherein the third data rate is lower than the first and second data rates.

Claim 53

A demodulator according to claim 46 wherein said demodulator means further comprises: a first carrier tracking loop for the third format; and a second carrier tracking loop for the first and second formats.

Claim 54

A demodulator according to claim 48 wherein said second carrier tracking loop comprises: a carrier numerically controlled oscillator (NCO); and carrier NCO control means for selectively operating said carrier NCO based upon a carrier phase of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 55

A demodulator according to claim 48 wherein said second carrier tracking loop comprises: a carrier loop filter; and carrier loop filter control means for selectively operating said carrier loop filter based upon a frequency of said first carrier tracking loop to thereby facilitate switching to the format of the variable data.

Claim 56

A demodulator according to claim 44 further comprising means for partitioning data into four bit nibbles of sign (one bit) and magnitude (three bits).

Claim 57

A demodulator according to claim 44 wherein the predetermined orthogonal code is a Walsh code modified by a modulo two addition of a fixed hexadecimal code thereto.

Claim 58

A demodulator according to claim 44 wherein the predetermined orthogonal code is a bi-orthogonal code.

Claim 59

A demodulator according to claim 44 wherein said at least one predetermined orthogonal code function correlator comprises: a predetermined orthogonal code function generator; and a plurality of parallel connected correlators connected to said predetermined orthogonal code function generator.

Claim 62

A method according to claim 55 further comprising the step of AC-coupling received information for spread spectrum PSK demodulating so that the reduced average DC signal component in combination with the AC-coupling enhances overall performance.

Claim 63

A method according to claim 55 further comprising the steps of modulating and demodulating in one of first format defined by bi-phase PSK (BPSK) modulation at a first data rate and a second format defined by quadrature PSK (QPSK) modulation at a second data rate.

Claim 64

A method according to claim 57 further comprising the steps of: modulating data packets to include a header at a third format defined by a predetermined modulation at a third data rate and variable data in one of the first and second formats; and demodulating data packets by demodulating the header at the third format and for switching to the respective one of the first and second formats of the variable data after the header.

Claim 65

A method according to claim 58 wherein the predetermined modulation of the third format is differential BPSK (DBPSK), and wherein the third data rate is lower than the first and second data rates.

Claim 66

A method according to claim 55 wherein the predetermined orthogonal code is a Walsh code modified by a modulo two addition of a fixed hexadecimal code thereto.

Claim 67

A method according to claim 55 wherein the predetermined orthogonal code is a bi-orthogonal code.